6 research outputs found
Modeling attacks on physical unclonable functions
We show in this paper how several proposed Physical Unclonable Functions (PUFs) can be broken by numerical modeling attacks. Given a set of challenge-response pairs (CRPs) of a PUF, our attacks construct a computer algorithm which behaves indistinguishably from the original PUF on almost all CRPs. This algorithm can subsequently impersonate the PUF, and can be cloned and distributed arbitrarily. This breaks the security of essentially all applications and protocols that are based on the respective PUF. The PUFs we attacked successfully include standard Arbited PUFs and Ring Oscillator PUFs of arbitrary sizes, and XO Arbiter PUFs, Lightweight Secure PUFs, and Feed-Forward Arbiter PUFs of up to a given size and complexity. Our attacks are based upon various machine learning techniques including Logistic Regression and Evolution Strategies. Our work leads to new design requirements for secure electrical PUFs, and will be useful to PUF designers and attackers alike.Technische Universitat Munche
Abusing Commodity DRAMs in IoT Devices to Remotely Spy on Temperature
The ubiquity and pervasiveness of modern Internet of Things (IoT) devices
opens up vast possibilities for novel applications, but simultaneously also
allows spying on, and collecting data from, unsuspecting users to a previously
unseen extent. This paper details a new attack form in this vein, in which the
decay properties of widespread, off-the-shelf DRAM modules are exploited to
accurately sense the temperature in the vicinity of the DRAM-carrying device.
Among others, this enables adversaries to remotely and purely digitally spy on
personal behavior in users' private homes, or to collect security-critical data
in server farms, cloud storage centers, or commercial production lines. We
demonstrate that our attack can be performed by merely compromising the
software of an IoT device and does not require hardware modifications or
physical access at attack time. It can achieve temperature resolutions of up to
0.5{\deg}C over a range of 0{\deg}C to 70{\deg}C in practice. Perhaps most
interestingly, it even works in devices that do not have a dedicated
temperature sensor on board. To complete our work, we discuss practical attack
scenarios as well as possible countermeasures against our temperature espionage
attacks.Comment: Submitted to IEEE TIFS and currently under revie
PUF Modeling Attacks on Simulated and Silicon Data
We discuss numerical modeling attacks on several proposed strong physical unclonable functions (PUFs). Given a set of challenge-response pairs (CRPs) of a Strong PUF, the goal of our attacks is to construct a computer algorithm which behaves indistinguishably from the original PUF on almost all CRPs. If successful, this algorithm can subsequently impersonate the Strong PUF, and can be cloned and distributed arbitrarily. It breaks the security of any applications that rest on the Strong PUF's unpredictability and physical unclonability. Our method is less relevant for other PUF types such as Weak PUFs. The Strong PUFs that we could attack successfully include standard Arbiter PUFs of essentially arbitrary sizes, and XOR Arbiter PUFs, Lightweight Secure PUFs, and Feed-Forward Arbiter PUFs up to certain sizes and complexities. We also investigate the hardness of certain Ring Oscillator PUF architectures in typical Strong PUF applications. Our attacks are based upon various machine learning techniques, including a specially tailored variant of logistic regression and evolution strategies. Our results are mostly obtained on CRPs from numerical simulations that use established digital models of the respective PUFs. For a subset of the considered PUFs-namely standard Arbiter PUFs and XOR Arbiter PUFs-we also lead proofs of concept on silicon data from both FPGAs and ASICs. Over four million silicon CRPs are used in this process. The performance on silicon CRPs is very close to simulated CRPs, confirming a conjecture from earlier versions of this work. Our findings lead to new design requirements for secure electrical Strong PUFs, and will be useful to PUF designers and attackers alike.National Science Foundation (U.S.) (Grant CNS 0923313)National Science Foundation (U.S.) (Grant CNS 0964641
Physically secure and fully reconfigurable data storage using optical scattering
This paper presents an optical method of storing random cryptographic keys within a reconfigurable volume of polymer-dispersed liquid crystal (PDLC). We suggest a PDLC-based device that functions as an integrated optical physical unclonable function (PUF). Our device can selectively access a dense set (up to 10 Gb/mm^3 in theory) of non-electronically saved random bits. Furthermore, this optical PUF can fully erase and transform these bits into a new random configuration in less than one second, via a simple electrical signal. When a short voltage spike is applied across the PDLC film interface, its optical scattering potential completely decorrelates. We confirm this phenomenon with detailed experiments on a proof-of-concept device, thereby suggesting the security use of a new class of optical materials as (i) securely and efficiently reconfigurable PUFs, and (ii) an erasable storage medium for random cryptographic keys. Our work can eventually help address the challenge of quickly and completely erasing sensitive digital electronic memory and/or key material. It also establishes a new and hopefully fruitful connection between security questions and the material sciences
Photonic Physical Unclonable Function Based on Symmetric Microring Resonator Arrays
International audienceWe propose a novel architecture for a photonic Physical Unclonable Function (PUF) based on microring arrays. We demonstrate its uniqueness, verify its random behavior on standard benchmarks, and investigate the impact of the digitization threshold
NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS
This special session paper introduces the Horizon Europe NEUROPULS project,
which targets the development of secure and energy-efficient RISC-V interfaced
neuromorphic accelerators using augmented silicon photonics technology. Our
approach aims to develop an augmented silicon photonics platform, an
FPGA-powered RISC-V-connected computing platform, and a complete simulation
platform to demonstrate the neuromorphic accelerator capabilities. In
particular, their main advantages and limitations will be addressed concerning
the underpinning technology for each platform. Then, we will discuss three
targeted use cases for edge-computing applications: Global National Satellite
System (GNSS) anti-jamming, autonomous driving, and anomaly detection in edge
devices. Finally, we will address the reliability and security aspects of the
stand-alone accelerator implementation and the project use cases.Comment: 10 pages, 2 figures, conferenc