375 research outputs found
Second-level NIST randomness tests for improving test reliability
Testing Random Number Generators (RNGs) is as important as designing them. Here we consider the NIST test suite SF 800-22 and we show that, as suggested by NIST itself, to reveal non-perfect generators a more in-depth analysis should be performed using the outcomes of the suite over many generated sequences. Testing these second-level statistics is not trivial and, relying on a proper model that takes into account the errors due to the approximations in the first level tests, we propose a tuning of the parameters in the simplest cases. The validity of our consideration is widely supported by experimental results on several RNG currently employed by major IT players, as well as a chaos-based RNG designed by authors
Improving PA efficiency by chaos-based spreading in multicarrier DS-CDMA systems
In this paper, we investigate the effect of spreading sequences on the peak-to-average power ratio (PAPR) in order to improve the power amplifier efficiency of multicarrier direct-sequence code-division multiple access systems. Baseband shaping has been identified to have a key role in reducing PAPR by spreading and we have found that chaos-based spreading sequences give good results as compared with Gold and i.i.d. sequences behaving differently depending on the number of subcarriers
A 3 GHz spread spectrum clock generator for SATA applications using chaotic PAM modulation
This paper proposes a prototype of a Spread Spectrum Clock Generator which is the first known specifically meant for 3 GHz Serial ATA-II applications. The modulation is obtained from a fractional PLL which employs a Delta-Sigma modulator. A further innovative aspect of our work is that our prototype takes advantage of a chaotic PAM as driving signal, instead a triangular signal as in all spread spectrum generators proposed in literature for SATA-II. In this way we avoid the periodicity of the modulated clock, completely flattening the peaks in the power spectral density. The circuit prototype has been designed n 0.13 μm CMOS technology and achieves a peak reduction greater than 14 dB measured at RBW = 100 kHz. The chip active area is 0.27×0.78 mm2 and the power consumption is as low as 14.7 mW. © 2008 IEEE
On the Approximation Errors in the Frequency Test Included in the NIST SP800-22 Statistical Test Suite
In previous papers we have addressed the problem of testing Random Number Generators (RNGs) through statistical tests, with particular emphasis on the approach we called second-level testing. We have shown that this approach is capable of achieving much higher accuracy in exposing non-random generators, but may suffer from reliability issues due to approximations introduced in the test. Here we consider the NIST Frequency Test and present a mathematical expression of the error introduced by approximating the effective discrete distribution function with its continuous limit distribution. The matching against experimental data is almost perfect. © 2008 IEEE
A Zero-Transient Dual-Frequency Control for Class-E Resonant DC-DC Converters
In this paper, a dual-frequency control method for regulating the output power in class-E resonant DC-DC converters has been introduced. As in the standard ON-OFF control or other recently proposed dual-frequency controls, the approach is based on the ability of the converter to alternately operate in a high- and a low-power state. The proposed solution has a twofold advantage: on the one hand, soft-switching capabilities (i.e., Zero-Voltage and Zero-Voltage-Derivative switching) are preserved in both operating states; on the other hand, it is possible to reduce to zero the transient time required to switch from one state to the other one. The most straightforward consequence is the possibility to increase to very large values the frequency at which the two operating states are switched, up to the same order of magnitude as the main switching frequency of the converter. In this way, the additional ripple introduced by the proposed dual-frequency control can be decreased to a negligible value. The approach has been validated by measurements on a prototype operating between 4Â MHz and 8Â MHz and in which it has been possible to increase the control frequency up to 500Â kHz
Asymptotic expressions of mismatch variance in interdigitated geometries
Performance in analog integrated circuits strongly depends on the mismatch between nominally identical devices. In this work we derive closed-form asymptotic expressions describing mismatch variance in multifinger structures, under the assumption of Gaussian autocorrelation for the mismatch-generating stochastic process. The analysis is performed on interdigitated geometries, eventually modified to make them common-centroid. Comparison with the numerical results provided by an independent model validates the theoretical expressions presented here
Stability and mismatch robustness of a leakage current cancellation technique
Leakage discharge currents represent one of the most detrimental factors for the maximum hold time in analog sample-and-hold circuits. Apart from the obvious passive solution of enlarging the sampling capacitor, alternatives based on active circuits have been proposed. We focus here on an existing solution which has proven to be effective in reducing the leakage discharge, hence extending the hold time, by a factor of 20. Being based on a feedback circuit built around the hold capacitor, it is paramount to understand its stability properties. This work tries to close the gap by analyzing the closed-loop stability of the nominal circuit. Classical control systems techniques are employed to thoroughly analyze the dynamic behaviour of the feedback circuit, highlighting the detrimental effect of device mismatches
A fully CMOS true random number generator based on hidden attractor hyperchaotic system
Low-power devices used in Internet-of-things networks have been short of security due to the high power consumption of random number generators. This paper presents a low-power hyperchaos-based true random number generator, which is highly recommended for secure communications. The proposed system, which is based on a four-dimensional chaotic system with hidden attractors and oscillators, exhibits rich dynamics. Numerical analysis is provided to verify the dynamic characteristics of the proposed system. A fully customized circuit is deployed using 130Â nm CMOS technology to enable integration into low-power devices. Four output signals are used to seed a SHIFT-XOR-based chaotic data post-processing to generate random bit output. The chip prototype was simulated and tested at 100Â MHz sampling frequency. The hyperchaotic circuit consumes a maximum of 980Â ÎĽ W in generating chaotic signals while dissipates a static current of 623Â ÎĽ A. Moreover, the proposed system provides ready-to-use binary random bit sequences which have passed the well-known statistical randomness test suite NIST SP800-22. The proposed novel system design and its circuit implementation provide a best energy efficiency of 4.37Â pJ/b at a maximum sampling frequency of 100Â MHz
Subspace Energy Monitoring for Anomaly Detection @Sensor or @Edge
The amount of data generated by distributed monitoring systems that can be exploited for anomaly detection, along with real time, bandwidth, and scalability requirements leads to the abandonment of centralized approaches in favor of processing closer to where data are generated. This increases the interest in algorithms coping with the limited computational resources of gateways or sensor nodes. We here propose two dual and lightweight methods for anomaly detection based on generalized spectral analysis. We monitor the signal energy laying along with the principal and anti-principal signal subspaces, and call for an anomaly when such energy changes significantly with respect to normal conditions. A streaming approach for the online estimation of the needed subspaces is also proposed. The methods are tested by applying them to synthetic data and real-world sensor readings. The synthetic setting is used for design space exploration and highlights the tradeoff between accuracy and computational cost. The real-world example deals with structural health monitoring and shows how, despite the extremely low computations costs, our methods are able to detect permanent and transient anomalies that would classically be detected by full spectral analysis
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