822 research outputs found

    The binding of botulinum neurotoxins to different peripheral neurons

    Get PDF
    Botulinum neurotoxins are the most potent toxins known. The double receptor binding modality represents one of the most significant properties of botulinum neurotoxins and largely accounts for their incredible potency and lethality. Despite the high affinity and the very specific binding, botulinum neurotoxins are versatile and multi-tasking toxins. Indeed they are able to act both at the somatic and at the autonomic nervous system. In spite of the preference for cholinergic nerve terminals botulinum neurotoxins have been shown to inhibit to some extent also the noradrenergic postganglionic sympathetic nerve terminals and the afferent nerve terminals of the sensory neurons inhibiting the release of neuropeptides and glutamate, which are responsible of nociception. Therefore, there is increasing evidence that the therapeutic effect in both motor and autonomic disorders is based on a complex mode of botulinum neurotoxin action modulating the activity of efferent as well as afferent nerve fibres

    The role of the single interchains disulfide bond in tetanus and botulinum neurotoxins and the development of antitetanus and antibotulism drugs

    Get PDF
    A large number of bacterial toxins consist of active and cell binding protomers linked by an interchain disulfide bridge. The largest family of such disulfide-bridged exotoxins is that of the clostridial neurotoxins that consist of two chains and comprise the tetanus neurotoxins causing tetanus and the botulinum neurotoxins causing botulism. Reduction of the interchain disulfide abolishes toxicity, and we discuss the experiments that revealed the role of this structural element in neuronal intoxication. The redox couple thioredoxin reductase-thioredoxin (TrxR-Trx) was identified as the responsible for reduction of this disulfide occurring on the cytosolic surface of synaptic vesicles. We then discuss the very relevant finding that drugs that inhibit TrxR-Trx also prevent botulism. On this basis, we propose that ebselen and PX-12, two TrxR-Trx specific drugs previously used in clinical trials in humans, satisfy all the requirements for clinical tests aiming at evaluating their capacity to effectively counteract human and animal botulism arising from intestinal toxaemias such as infant botulism

    An Empirical Study of Business Student Engagement with Active Teaching Strategies: A Comparison of First Year and Senior Students

    Get PDF
    The quantitative evaluation of student engagement has been difficult to achieve. This study uses Kahu’s (2013) conceptual framework to investigate the effectiveness of active teaching strategies and how they influence Business students’ engagement in a blended learning environment. First, we quantify the influence of various in-class active teaching activities and out-of-class support tools upon student engagement. The link between engagement and student outcomes in terms of academic results and personal and professional skills development is then captured in our empirical modelling. Results are compared between first year and senior students to understand significant differences in their engagement and experience. Our findings suggest that first year students display a higher propensity to utilize in-class learning activities and out-of-class support tools. This in turn, establishes a strong link with their engagement patterns. However, there is a weaker link between first year student engagement and outcomes compared to senior students. Overall, this study reinforces the usefulness of Kahu’s framework to guide curricula developments that cater for learners’ different needs

    Design of High Dynamic Range Digital to Analog Converters for the Calibration of the CALICE Si-W Ecal readout electronics

    Get PDF
    The ILC ECAL front-end chip will integrate many functions of the readout electronics including a DAC dedicated to calibration. We present two versions of DAC with respectively 12 and 14 bits, designed in a CMOS 0.35ÎĽm process. Both are based on segmented arrays of switched capacitors controlled by a Dynamic Element Matching (DEM) algorithm. A full differential architecture is used, and the amplifiers can be turned into a standby mode reducing the power dissipation. The 12 bit DAC features an INL lower than 0.3 LSB at 5MHz, and dissipates less than 7mW. The 14 bit DAC is an improved version of the 12 bit design

    A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

    No full text
    International audienceA 4 bit very low power and low incoming signal analog to digital converter (ADC) using a double sampling switched capacitor technique, designed for use in CMOS monolithic active pixels sensor readout, has been implemented in 0.35ÎĽm CMOS technology. A non-resetting sample and hold stage is integrated to amplify the incoming signal by 4. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of a 2.5 bit pipeline stage followed by a 2 bit flash stage. This prototype consists of 4 ADC double-channels; each one is sampling at 50MS/s and dissipates only 2.6mW at 3.3V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1ÎĽs. The size for the layout is 80ÎĽm*0.9mm. This corresponds to the pitch of 4 pixel columns, each one is 20ÎĽm wide

    The radio emission pattern of air showers as measured with LOFAR - a tool for the reconstruction of the energy and the shower maximum

    Get PDF
    The pattern of the radio emission of air showers is finely sampled with the Low-Frequency ARray (LOFAR). A set of 382 measured air showers is used to test a fast, analytic parameterization of the distribution of pulse powers. Using this parameterization we are able to reconstruct the shower axis and give estimators for the energy of the air shower as well as the distance to the shower maximum.Comment: 15 pages, 10 figures, accepted for publication in JCA

    A low power and low signal 5-bit 25MS/s pipelined ADC for monolithic active pixel sensors

    No full text
    For CMOS monolithic active pixels sensor readout, we developed a 5 bit low power analog to digital converter using a pipelined architecture. A non-resetting sample and hold stage is included to amplify the signal by a factor of 4. Due to the very low level of the incoming signal, this first stage compensates both the amplifier offset effect and the input common mode voltage dispersion. The converter consists of three 1.5 bit sub-ADC and a 2 bit flash. We present the results of a prototype, made of eight ADC channels. The maximum sampling rate is 25MS/s. The total DC power consumption is 1.7mW/channel on a 3.3V supply voltage recommended for the process. But at a reduced 2.5V supply, it consumes only 1.3mW. The size of each ADC channel layout is only 43ÎĽm*1.43mm. This corresponds to the pitch of two pixel columns each one would be 20ÎĽm wide. The full analog part of the converter can be quickly switched to a standby idle mode in less than 1ÎĽs; thus reducing the power dissipation to a ratio better than 1/1000. This fast shutdown is very important for the ILC vertex detector as the total DC power dissipation becomes directly proportional to the low beam duty cycle

    Application d'un cache 2D prédictif à l'accélération de la rétroprojection TEP 2D

    Get PDF
    Le développement et la diffusion deséquipements TEP passent par la réduction des temps de calcul de la reconstruction des images acquises. Aussi cet article présente une solution mixte logicielle/matérielle pour l'accélération de la reconstruction 2D sur une plateforme SOPC (System on Programmable Chip), la nouvelle génération de circuits reconfigurables. Le verrou technologique posé par la latence des accès mémoire est levé grâce au cache 2D Adaptatif et Prédictif (cache 2D-AP). Abstract : Reduction of image reconstruction time is a key point for the development and spreading of PET scans. Thus this article presentes a hardware/software architecture which aims at accelerating the 2D reconstruction on a SoPC (System on Programmable Chip) plateform, the new generation of reconfigurable chip. Issue posed by the latency of memory accesses has been solved thanks to the 2D Aptative and Predictive cache (2D-AP cache)
    • …
    corecore