Optical terabit transmitter and receiver based on passive polymer and InP technology for high-speed optical connectivity between datacenters

We demonstrate the hybrid integration of a multi-format tunable transmitter and a coherent optical receiver based on optical polymers and InP electronics and photonics for next generation metro and core optical networks. The transmitter comprises an array of two InP Mach-Zehnder modulators (MZMs) with 42 GHz bandwidth and two passive PolyBoards at the back- and front-end of the device. The back-end PolyBoard integrates an InP gain chip, a Bragg grating and a phase section on the polymer substrate capable of 22 nm wavelength tunability inside the C-band and optical waveguides that guide the light to the inputs of the two InP MZMs. The front-end PolyBoard provides the optical waveguides for combing the In-phase and Quadrature-phase modulated signals via an integrated thermo-optic phase shifter for applying the pi/2 phase-shift at the lower arm and a 3-dB optical coupler at the output. Two InP-double heterojunction bipolar transistor (InP-DHBT) 3-bit power digital-to-analog converters (DACs) are hybridly integrated at either side of the MZM array chip in order to drive the IQ transmitter with QPSK, 16-QAM and 64-QAM encoded signals. The coherent receiver is based on the other side on a PolyBoard, which integrates an InP gain chip and a monolithic Bragg grating for the formation of the local oscillator laser, and a monolithic 90° optical hybrid. This PolyBoard is further integrated with a 4-fold InP photodiode array chip with more than 80 GHz bandwidth and two high-speed InP-DHBT transimpedance amplifiers (TIAs) with automatic gain control. The transmitter and the receiver have been experimentally evaluated at 25Gbaud over 100 km for mQAM modulation showing bit-error-rate (BER) performance performance below FEC limit

Conception, realisation et caracterisation d'un transistor a heterojonction GaAs/GaAlAs

SIGLECNRS T 57033 / INIST-CNRS - Institut de l'Information Scientifique et TechniqueFRFranc

InP HBT XOR and phase-detector for 40 Gbit/s clock and data recovery (CDR)

International audienceHigh-speed XOR and phase-detector circuit necessary for clock and data recovery were designed and fabricated in a self-aligned InP DHBT technology. In the paper, we present the circuit design with the special highlight of the architecture choice and design challenges. Measurements results of fabricated circuits are shown

Non linear model of InP/GaAsSb/InP DHBT process for design of a Q-Band MMIC oscillator

This paper presents the design of a MMIC oscillator operating at a 45 GHz frequency. This circuit was made by Alcatel-Thales III-V Lab with the new InP/GaAsSb/InP DHBT submicronic technology (We=700 nm). This transistor has a 15-m-long two-finger emitter. This paper describes the complete nonlinear modeling of heterojunction bipolar transistor used in this circuit. The interest of the methodology used to design this oscillator, is to be able to choose a nonlinear operating condition of the transistor from a study in amplifier mode. The oscillator simulation and measurement results are compared