First results of a novel Silicon Drift Detector array designed for low energy X-ray fluorescence spectroscopy

We developed a trapezoidal shaped matrix with 8 cells of Silicon Drift Detectors (SDD) featuring a very low leakage current (below 180 pA/cm2 at 20 \ub0C) and a shallow uniformly implanted p+ entrance window that enables sensitivity down to few hundreds of eV. The matrix consists of a completely depleted volume of silicon wafer subdivided into 4 square cells and 4 half-size triangular cells. The energy resolution of a single square cell, readout by the ultra-low noise SIRIO charge sensitive preamplifier, is 158 eV FWHM at 5.9 keV and 0 \ub0C. The total sensitive area of the matrix is 231 mm2 and the wafer thickness is 450\u3bcm. The detector was developed in the frame of the INFN R&D project ReDSoX in collaboration with FBK, Trento. Its trapezoidal shape was chosen in order to optimize the detection geometry for the experimental requirements of low energy X-ray fluorescence (LEXRF) spectroscopy, aiming at achieving a large detection angle. We plan to exploit the complete detector at the TwinMic spectromicroscopy beamline at the Elettra Synchrotron (Trieste, Italy). The complete system, composed of 4 matrices, increases the solid angle coverage of the isotropic photoemission hemisphere about 4 times over the present detector configuration. We report on the layout of the SDD matrix and of the experimental set-up, as well as the spectroscopic performance measured both in the laboratory and at the experimental beamline. \ua9 2015 Elsevier B.V

PixDD: a multi-pixel silicon drift detector for high-throughput spectral-timing studies

The Pixelated silicon Drift Detector (PixDD) is a two-dimensional multi-pixel X-ray sensor based on the technology of Silicon Drift Detectors, designed to solve the dead time and pile-up issues of photon-integrating imaging detectors. Read out by a two-dimensional self-triggering Application-Specific Integrated Circuit named RIGEL, to which the sensor is bump-bonded, it operates in the 0:5 — 15 keV energy range and is designed to achieve single-photon sensitivity and good spectroscopic capabilities even at room temperature or with mild cooling (< 150 eV resolution at 6 keV at 0 °C). The paper reports on the design and performance tests of the 128-pixel prototype of the fully integrated system

Measurement of Johnson Noise Induced by p-Stops in Silicon Microstrip Detectors

none3We report on noise measurements performed on the n-side of double-sided, AC-coupled, punch-through biased silicon strip detectors. The noise has been measured over a wide range of peaking times and bias voltages, allowing the disentanglement of two excess noise terms, one related to the p-stops surrounding the strips and the other related to the electron accumulation layer at the Si/SiO2 interface.G. Giacomini; L. Bosisio; I. RashevskayaGiacomini, Gabriele; L., Bosisio; Rachevskaia, Irin

Study of frequency-dependent strip admittance in silicon microstrip detectors

We report on detailed interstrip admittance measurements performed on double-sided, AC-coupled and punch-through biased silicon microstrip detectors. The sensors chosen have been fabricated on very high resistivity substrates, which translates in very low depletion voltages, in the range 10–20 V. This, together with the absence of bias resistors, allows a careful study of the strip admittance components over a wide range of bias voltages and frequencies. In some instances, beyond total depletion the measured interstrip capacitance and dissipation factor exhibit a marked voltage and frequency dependence, linked to the presence of some resistive component. A simple lumped electrical model has been developed to explain the observed features and 3-D numerical simulations have been performed, supporting the interpretation of the phenomena. These features of the admittance have been found to be closely correlated with a non-standard noise term, exhibiting a peculiar frequency/time dependence, which adds in quadrature to the well known parallel and series noise sources

Noise Characterization of Double-Sided Silicon Microstrip Detectors With Punch-Through Biasing

none4We report on extensive noise measurements performed on double-sided, AC-coupled, punch-through biased silicon strip detectors. We used a single-channel acquisition chain, reading one strip per side, all other strips being kept grounded. The noise has been measured over a wide range of peaking times and leakage currents, allowing a careful determination of the various noise contributions. We determined the noise contribution of the punch-through mechanism and we observed, on different sensors, two unexpected noise terms, one related to the punch-through current and the other to the presence of resistive layers at the Si/SiO2 interface.G. Giacomini; L. Bosisio; I. Rashevskaya; O. StarodubtsevGiacomini, Gabriele; L., Bosisio; I., Rashevskaya; O., Starodubtse

Quadruple Well CMOS MAPS With Time-Invariant Processor Exposed to Ionizing Radiation and Neutrons

Monolithic active pixel sensors featuring a time-invariant front-end channel have been fabricated in a quadruple well CMOS process in the frame of an R&D project aiming at developing low material budget, radiation hard detectors for tracking applications. MAPS prototypes have been exposed to integrated fluences up to 10^14 1 MeV neutron equivalent / cm^2 to test the device tolerance to bulk damage also for different values of the epitaxial layer resistivity. Moreover, samples of the same device have been irradiated with y-rays from a 60Co source, reaching a final dose exceeding 10 Mrad, to study ionizing radiation effects. This work discusses the test results, obtained through different measurement techniques, and the mechanisms underlying performance degradation in irradiated quadruple well CMOS MAPS

Modeling Charge Loss in CMOS MAPS Exposed to Non-Ionizing Radiation

A model, approximating minority carrier diffusion with a discrete random walk and accounting for radiation induced reduction of minority carrier lifetime, is proposed to predict the effects of neutron irradiation on the charge collection properties of monolithic active pixel sensors (MAPS) in CMOS technology. The model has been implemented in a Monte Carlo code to simulate MAPS operation in minimum ionizing particle detection systems. For the purpose of validating it, the results from the characterization of monolithic sensors irradiated up to an integrated fluence of 10^14 1 MeV neutron equivalent / cm^2 have been compared with the outcomes of the Monte Carlo simulations. The monolithic sensors taken into consideration for the model validation are based on two different CMOS processes, one featuring a triple well option, the other one featuring a quadruple well structure and a standard (10 ohm cm) or high (1 kohm cm) resistivity epitaxial layer. Simulation results are shown to be in good agreement with experimental data. The consistency between the model and the measurement results seems to confirm that radiation induced increase in the recombination rate is the main source of charge collection degradation in neutron-irradiated MAPS

The high performance microstrip silicon detector tracking system for an innovative crystal based collimation experiment

In order to increase the LHC luminosity, an innovative crystal based collimation system is being developed in the UA9 experiment: exploiting the well-known effect of channeling and the recently discovered volume reflection phenomenon, a short silicon bent crystal will be used to replace the traditional multi-stage collimation system to remove the beam halo particles. This idea will be tested with a 120 GeV/c proton beam on the LSS5 straight section at the SPS accelerator ring (CERN) using several crystal technologies and a high performance tracking system based on high resolution (5 pm) double-side microstrip silicon detectors. The first silicon detector will be positioned in a roman pot at about 50 m from the crystal, where the phase difference of 90 maximizes the distance of the steered particles (due to the crystal) from the beam core; after around 20 m a second tracking station will be able to measure the steering angle. Each detector side is readout by three 128 channel VA1TA self-triggering ASICs, which contain a preamplifier, two shapers and a sample and hold circuit; the analog signals are digitized by one 10 MHz ADC (per ASIC) and are carried to the DAQ system (which is located on ground) by a series of fiber links (GOH). The DAQ will be completed by a Slow Controls system which will check the power supply voltages and currents and the roman pot pressures and temperatures. This paper gives an insight of the UA9 experiment, underlining the tracking system features and the first results of a silicon detector prototype in the SPS

Monolithic pixel sensors for fast silicon vertex trackers in a quadruple well CMOS technology

Apsel4well is a monolithic active pixel sensor (MAPS) chip intended for application to fast and low material silicon vertex trackers for future experiments at high intensity machines. The design is based on a 180 nm CMOS process with quadruple well option called INMAPS. This technology makes it possible to increase the in-pixel intelligence as compared to standard three transistor MAPS and their variants. Moreover, the availability of a high resistivity epitaxial layer is confirmed to lead to further improvements in terms of charge collection performance and radiation resistance. This paper, after providing some details on the INMAPS process, focuses on the analog front-end section of the pixel readout chain. Measurement results on the main analog channel parameters, like charge sensitivity and equivalent noise charge, are given along with charge collection properties evaluation through 90Sr/ 90Y spectrum measurements and laser stimulation. Characterization data were also used for validating a TCAD model of the device. Finally, selected results from a neutron irradiation campaign with fluences up to 2.7 7 10^13 1 MeV neutron equivalent / cm^2 will be shown