Receptor protein tyrosine phosphatases control Purkinje neuron firing

Spinocerebellar ataxias (SCA) are a genetically heterogeneous family of cerebellar neurodegenerative diseases characterized by abnormal firing of Purkinje neurons and degeneration. We recently demonstrated the slowed firing rates seen in several SCAs share a common etiology of hyper-activation of the Src family of non-receptor tyrosine kinases (SFKs). However, the lack of clinically available neuroactive SFK inhibitors lead us to investigate alternative mechanisms to modulate SFK activity. Previous studies demonstrate that SFK activity can be enhanced by the removal of inhibitory phospho-marks by receptor-protein-tyrosine phosphatases (RPTPs). In this Extra View we show that MTSS1 inhibits SFK activity through the binding and inhibition of a subset of the RPTP family members, and lowering RPTP activity in cerebellar slices with peptide inhibitors increases the suppressed Purkinje neuron basal firing rates seen in two different SCA models. Together these results identify RPTPs as novel effectors of Purkinje neuron basal firing, extending the MTSS1/SFK regulatory circuit we previously described and expanding the therapeutic targets for SCA patients

Introduction

This chapter provides an overview of the book theme, motivating the need for high-performance and time-predictable embedded computing. It describes the challenges introduced by the need for time-predictability on the one hand, and high-performance on the other, discussing on a high level how these contradictory requirements can be simultaneously supported

Measurement-Based Timing Analysis of the AURIX Caches

Cache memories are one of the hardware resources with higher potential to reduce worst-case execution time (WCET) costs for software programs with tight real-time constraints. Yet, the complexity of cache analysis has caused a large fraction of real-time systems industry to avoid using them, especially in the automotive sector. For measurement-based timing analysis (MBTA) - the dominant technique in domains such as automotive - cache challenges the definition of test scenarios stressful enough to produce (cache) layouts that causing high contention. In this paper, we present our experience in enabling the use of caches for a real automotive application running on an AURIX multiprocessor, using software randomization and measurement-based probabilistic timing analysis (MBPTA). Our results show that software randomization successfully exposes - in the experiments performed for timing analysis - cache related variability, in a manner that can be effectively captured by MBPTA