49 research outputs found

    Characterization of the CBC2 readout ASIC for the CMS strip-tracker high-luminosity upgrade

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    The CMS Binary Chip 2 (CBC2) is a full-scale prototype ASIC developed for the front-end readout of the high-luminosity upgrade of the CMS silicon strip tracker. The 254-channel, 130 nm CMOS ASIC is designed for the binary readout of double-layer modules, and features cluster-width discrimination and coincidence logic for detecting high-PT track candidates. The chip was delivered in January 2013 and has since been bump-bonded to a dual-chip hybrid and extensively tested. The CBC2 is fully functional and working to specification: we present the result of electrical characterization of the chip, including gain, noise, threshold scan and power consumption, together with the performance of the stub finding logic. Finally we will outline the plan for future developments towards the production version

    Results from the CBC3 readout ASIC for CMS 2S-modules

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    The CBC3 is the latest version of the CMS Binary Chip for readout of the outer radial region of the upgraded CMS Tracker at the High Luminosity LHC. This 254-channel, 130 nm CMOS ASIC is designed to be bump-bonded to a substrate to which sensors will be wire-bonded. It will instrument double-layer 2S-modules, containing two overlaid silicon microstrip sensors, aligned with a parallel orientation. On-chip logic identifies Level-1 trigger primitives from high transverse-momentum tracks by selecting correlated clusters in the two sensors. The CBC3 was delivered in late 2016; wafer probing and performance tests have been carried out. Several prototype modules using the CBC3 have been produced and tested in the lab and in different beams. The results show that the CBC3 satisfies CMS requirements and only small corrections are needed for the final version of the chip for production

    Commissioning of the BRIKEN detector for the measurement of very exotic ÎČ-delayed neutron emitters

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    A new detection system has been installed at the RIKEN Nishina Center (Japan) to investigate decay properties of very neutron-rich nuclei. The setup consists of three main parts: a moderated neutron counter, a detection system sensitive to the implantation and decay of radioactive ions, and gamma-ray detectors. We describe here the setup, the commissioning experiment and some selected results demonstrating its performance for the measurement of half-lives and beta-delayed neutron emission probabilities. The methodology followed in the analysis of the data is described in detail. Particular emphasis is placed on the correction of the accidental neutron background

    Design of analog front-ends for the RD53 demonstrator chip

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    The RD53 collaboration is developing a large scale pixel front-end chip, which will be a tool to evaluate the performance of 65 nm CMOS technology in view of its application to the readout of the innermost detector layers of ATLAS and CMS at the HL-LHC. Experimental results of the characterization of small prototypes will be discussed in the frame of the design work that is currently leading to the development of the large scale demonstrator chip RD53A to be submitted in early 2017. The paper is focused on the analog processors developed in the framework of the RD53 collaboration, including three time over threshold front-ends, designed by INFN Torino and Pavia, University of Bergamo and LBNL and a zero dead time front-end based on flash ADC designed by a joint collaboration between the Fermilab and INFN. The paper will also discuss the radiation tolerance features of the front-end channels, which were exposed to up to 800 Mrad of total ionizing dose to reproduce the system operation in the actual experiment

    The Advanced Implantation Detector Array (AIDA)

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    The Advanced Implantation Detector Array (AIDA) is a state-of-the-art detector system for the measurement of the decay properties of exotic nuclei at fragmentation/fission facilities. Built around stacks of up to eight 8cm×8cm, 128 × 128 strip (16384 pixels) or up to four 24cm×8cm, 384 × 128 strip (49152 pixels) double sided silicon strip detectors, the positions of both implanted ions and their subsequent decay products can be measured to sub-mm precision. The large number of pixels per detector provide implant-decay correlations at implantation rates ∌kHz. To process signals from the large number of strips application specific integrated circuits provide low and high gain signal processing per strip (20 GeV and 20 MeV full scale range) with a dynamic range of 1000:1, or better. A summary of the system and the analysis methodologies used are presented

    CBC2: A CMS microstrip readout ASIC with logic for track-trigger modules at HL-LHC

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    The CBC2 is the latest version of the CMS Binary Chip ASIC for readout of the upgraded CMS Tracker at the High Luminosity LHC. It is designed in 130 nm CMOS with 254 input channels and will be bump-bonded to a substrate to which sensors will be wire-bonded. The CBC2 is designed to instrument double layer modules, consisting of two overlaid silicon microstrip sensors with aligned microstrips, in the outer tracker. It incorporates logic to identify L1 trigger primitives in the form of “stubs”: high transverse-momentum track candidates which are identified within the low momentum background by selecting correlated hits between two closely separated microstrip sensors. The first prototype modules have been assembled. The performance of the chip in recent laboratory tests is briefly reported and the status of module construction described
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