Readout Architectures for High Efficiency in Time-Correlated Single Photon Counting Experiments—Analysis and Review

In recent years, time-correlated single photon counting (TCSPC) has become the technique of choice in many life science analyses, where fast and faint luminous signals are recorded with picosecond accuracy. Nevertheless, the maximum operating frequency of a single TCSPC acquisition channel limits the measurement speed, especially when scanning point systems are exploited. In order to increase the speed of TCSPC experiments, many multichannel systems based on single photon avalanche diode arrays have been proposed in the literature, which integrate thousands of pixels on the same chip. Unfortunately, the huge number of data generated by this kind of system can easily bring to the saturation of the transfer bandwidth to the external processing unit. For this reason, several different readout architectures have been proposed in the literature, attempting to exploit at best the limited bandwidth under TCSPC operating conditions. In this paper, some typical readout approaches, namely clock-driven and event-driven readouts, are discussed and compared, along with a recently-introduced router-based algorithm that is specifically designed to obtain maximum bandwidth exploitation under any condition. Quantitative comparisons are performed starting from imager response of the systems, which is the rate of recorded events in the case of uniform illumination of the detector array

Improving the counting efficiency in time-correlated single photon counting experiments by dead-time optimization

Time-Correlated Single Photon Counting (TCSPC) has been long recognized as the most sensitive method for fluorescence lifetime measurements, but often requiring “long” data acquisition times. This drawback is related to the limited counting capability of the TCSPC technique, due to pile-up and counting loss effects. In recent years, multi-module TCSPC systems have been introduced to overcome this issue. Splitting the light into several detectors connected to independent TCSPC modules proportionally increases the counting capability. Of course, multi-module operation also increases the system cost and can cause space and power supply problems. In this paper, we propose an alternative approach based on a new detector and processing electronics designed to reduce the overall system dead time, thus enabling efficient photon collection at high excitation rate. We present a fast active quenching circuit for single-photon avalanche diodes which features a minimum dead time of 12.4 ns. We also introduce a new Time-to-Amplitude Converter (TAC) able to attain extra-short dead time thanks to the combination of a scalable array of monolithically integrated TACs and a sequential router. The fast TAC (F-TAC) makes it possible to operate the system towards the upper limit of detector count rate capability (∼80 Mcps) with reduced pile-up losses, addressing one of the historic criticisms of TCSPC. Preliminary measurements on the F-TAC are presented and discussed

High-speed and low-distortion solution for time-correlated single photon counting measurements: A theoretical analysis

In this paper, we describe a novel solution to increase the speed of Time-Correlated Single Photon Counting (TCSPC) measurements by almost an order of magnitude while providing, in principle, zero distortion regardless of the experimental conditions. Typically, the relatively long dead time associated with the conversion electronics requires a proper tune of the excitation power in order to avoid distortions of the reconstructed waveform due to pileup and counting loss. As a result, the maximum operating rate of a TCSPC channel is now limited between 1% and 5% of the excitation frequency, thus leading to relatively long acquisition times. We show that negligible distortion (below 1%) is guaranteed if the dead time associated with the converter is kept below the dead time of the detector, and at the same time the detector dead time is matched to the duration of the excitation period. In this way, unprecedented high-speed operation is possible. In this paper, we provide a theoretical analysis of the technique, including the main non-idealities which are introduced by a generic physical implementation. The results are supported by both numerical simulations and analytical calculations

32-channel time-correlated-single-photon-counting system for high-throughput lifetime imaging

Time-Correlated Single Photon Counting (TCSPC) is a very efficient technique for measuring weak and fast optical signals, but it is mainly limited by the relatively “long” measurement time. Multichannel systems have been developed in recent years aiming to overcome this limitation by managing several detectors or TCSPC devices in parallel. Nevertheless, if we look at state-of-the-art systems, there is still a strong trade-off between the parallelism level and performance: the higher the number of channels, the poorer the performance. In 2013, we presented a complete and compact 32 × 1 TCSPC system, composed of an array of 32 single-photon avalanche diodes connected to 32 time-to-amplitude converters, which showed that it was possible to overcome the existing trade-off. In this paper, we present an evolution of the previous work that is conceived for high-throughput fluorescence lifetime imaging microscopy. This application can be addressed by the new system thanks to a centralized logic, fast data management and an interface to a microscope. The new conceived hardware structure is presented, as well as the firmware developed to manage the operation of the module. Finally, preliminary results, obtained from the practical application of the technology, are shown to validate the developed system

Note: Wide-operating-range control for thermoelectric coolers

A new algorithm for controlling the temperature of a thermoelectric cooler is proposed. Unlike a classic proportional-integral-derivative (PID) control, which computes the bias voltage from the temperature error, the proposed algorithm exploits the linear relation that exists between the cold side's temperature and the amount of heat that is removed per unit time. Since this control is based on an existing linear relation, it is insensitive to changes in the operating point that are instead crucial in classic PID control of a non-linear system

Toward a 2D high-performance multi-channel system for time-correlated single-photon counting applications

Time-Correlated Single Photon Counting (TCSPC) is acknowledged as one of the most effective techniques for measuring weak and fast optical signals, since it provides very high temporal resolution and sensitivity. Nevertheless, the long acquisition time needed to perform a measurement it's still the main drawback. To overcome this limitation, multidimensional TCSPC systems have been developed, but they still suffer for a strong trade-off between performance and number of channels: the higher the number of channels, the poorer the performance. In this work we present the design of a complete TCSPC acquisition system which is meant to overcome this trade-off. Since the best state-of-the-art detectors and sensing circuits developed so far are designed with different technologies, following the same approach those circuits will be designed onto different chips to achieve the best performance from both sides. Through Silicon Vias (TSVs) will be investigated as a possible solution for connecting a custom technology SPAD array to a CMOS pick-up circuit. Since a high number of detectors will cause the count rate to saturate due to the limited transfer rate of a PC, the target throughput has been set to 10 Gb/s, well beyond the state of the art. Consequently, the number of acquisition chains has been tailored on the affordable throughput, and a dynamic-routing logic connects the detectors to this lower number of acquisition channels. Five fast Time-to-Amplitude Converters (TACs), able to reach 80 Mconv/s, have been designed to get high temporal resolution along with low dead time

Highly efficient router-based readout algorithm for single-photon-avalanche-diode imagers for time-correlated experiments

Time-Correlated Single Photon Counting (TCSPC) is a powerful tool that permits to record extremely fast optical signals with a precision down to few picoseconds. On the other hand, it is recognized as a relatively slow technique, especially when a large time-resolved image is acquired exploiting a single acquisition channel and a scanning system. During the last years, much effort has been made towards the parallelization of many acquisition and conversion chains. In particular, the exploitation of Single-Photon Avalanche Diodes in standard CMOS technology has paved the way to the integration of thousands of independent channels on the same chip. Unfortunately, the presence of a large number of detectors can give rise to a huge rate of events, which can easily lead to the saturation of the transfer rate toward the elaboration unit. As a result, a smart readout approach is needed to guarantee an efficient exploitation of the limited transfer bandwidth. We recently introduced a novel readout architecture, aimed at maximizing the counting efficiency of the system in typical TCSPC measurements. It features a limited number of high-performance converters, which are shared with a much larger array, while a smart routing logic provides a dynamic multiplexing between the two parts. Here we propose a novel routing algorithm, which exploits standard digital gates distributed among a large 32x32 array to ensure a dynamic connection between detectors and external time-measurement circuits

Highly efficient readout integrated circuit for dense arrays of SPAD detectors in time-correlated measurements

In the last years, Time Correlated Single Photon Counting (TCSPC) has become the technique of choice in fluorescence lifetime measurements, given its remarkable sensitivity, accuracy and timing resolution. Nevertheless, a major drawback of this technique lies in the relatively long acquisition time. In order to overcome this issue, many multichannel systems have been proposed in literature, but the presence of many independent acquisition chains gives rise in principle to a huge data rate at the output, which cannot be processed in real time by a PC. Typically adopted solutions involve a limitation of the maximum detection frequency of each channel, so the measurement speed of currently available systems has not increased accordingly with the number of acquisition chains and is still limited well below the saturation of the transfer rate towards the elaboration unit. We present a completely different approach: starting from the maximum manageable data rate imposed by the transfer towards the PC, a proper number of high-performance external channels has been chosen to be shared among a much larger number of Single Photon Avalanche Diode (SPAD) detectors. Then, at each excitation period a dynamic routing mechanism performs a selection among the whole set of detectors carrying a valid signal and routes them towards the external channels. The selection logic relies on a pixelated architecture and on 3D-stacking techniques to connect each SPAD to its dedicated electronic, leading to a minimization of the number of interconnections crossing the integrated system

High-efficiency dynamic routing architecture for the readout of single photon avalanche diode arrays in time-correlated measurements

In recent years, the Time-Correlated Single Photon Counting (TCSPC) technique has gained a prominent role in many fields, where the analysis of extremely fast and faint luminous signals is required. In the life science, for instance, the estimation of fluorescence time-constants with picosecond accuracy has been leading to a deeper insight into many biological processes. Although the many advantages provided by TCSPC-based techniques, their intrinsically repetitive nature leads to a relatively long acquisition time, especially when time-resolved images are obtained by means of a single detector, along with a scanning point system. In the last decade, TCSPC acquisition systems have been subjected to a fast trend towards the parallelization of many independent channels, in order to speed up the measure. On one hand, some high-performance multi-module systems have been already made commercially available, but high area and power consumption of each module have limited the number of channels to only some units. On the other hand, many compact systems based on Single Photon Avalanche Diodes (SPAD) have been proposed in literature, featuring thousands of independent acquisition chains on a single chip. The integration of both detectors and conversion electronic in the same pixel area, though, has imposed tight constraints on power dissipation and area occupation of the electronics, resulting in a tradeoff with performance, both in terms of differential nonlinearity and timing jitter. Furthermore, in the ideal case of simultaneous readout of a huge number of channels, the overall data rate can be as high as 100 Gbit/s, which is nowadays too high to be easily processed in real time by a PC. Typical adopted solutions involve an arbitrary dwell time, followed by a sequential readout of the converters, thus limiting the maximum operating frequency of each channel and impairing the measurement speed, which still lies well below the limit imposed by the saturation of the transfer rate towards the elaboration unit. We developed a novel readout architecture, starting from a completely different perspective: considering the maximum data rate we can manage with a PC, a limited set of conversion data is selected and transferred to the elaboration unit during each excitation period, in order to take full advantage of the bus bandwidth toward the PC. In particular, we introduce a smart routing logic, able to dynamically connect a large number of SPAD detectors to a limited set of high-performance external acquisition chains, paving the way for a more efficient use of resources and allowing us to effectively break the tradeoff between integration and performance, which affects the solutions proposed so far. The routing electronic features a pixelated architecture, while 3D-stacking techniques are exploited to connect each SPAD to its dedicated electronic, leading to a minimization of the overall number of interconnections crossing the integrated system, which is one of the main issues in high-density arrays