Second-level NIST randomness tests for improving test reliability

Testing Random Number Generators (RNGs) is as important as designing them. Here we consider the NIST test suite SF 800-22 and we show that, as suggested by NIST itself, to reveal non-perfect generators a more in-depth analysis should be performed using the outcomes of the suite over many generated sequences. Testing these second-level statistics is not trivial and, relying on a proper model that takes into account the errors due to the approximations in the first level tests, we propose a tuning of the parameters in the simplest cases. The validity of our consideration is widely supported by experimental results on several RNG currently employed by major IT players, as well as a chaos-based RNG designed by authors

On a continuous mixed strategies model for evolutionary game theory

We consider an integro-differential model for evolutionary game theory which describes the evolution of a population adopting mixed strategies. Using a reformulation based on the first moments of the solution, we prove some analytical properties of the model and global estimates. The asymptotic behavior and the stability of solutions in the case of two strategies is analyzed in details. Numerical schemes for two and three strategies which are able to capture the correct equilibrium states are also proposed together with several numerical examples

A 3 GHz spread spectrum clock generator for SATA applications using chaotic PAM modulation

This paper proposes a prototype of a Spread Spectrum Clock Generator which is the first known specifically meant for 3 GHz Serial ATA-II applications. The modulation is obtained from a fractional PLL which employs a Delta-Sigma modulator. A further innovative aspect of our work is that our prototype takes advantage of a chaotic PAM as driving signal, instead a triangular signal as in all spread spectrum generators proposed in literature for SATA-II. In this way we avoid the periodicity of the modulated clock, completely flattening the peaks in the power spectral density. The circuit prototype has been designed n 0.13 μm CMOS technology and achieves a peak reduction greater than 14 dB measured at RBW = 100 kHz. The chip active area is 0.27×0.78 mm2 and the power consumption is as low as 14.7 mW. © 2008 IEEE

On the Approximation Errors in the Frequency Test Included in the NIST SP800-22 Statistical Test Suite

In previous papers we have addressed the problem of testing Random Number Generators (RNGs) through statistical tests, with particular emphasis on the approach we called second-level testing. We have shown that this approach is capable of achieving much higher accuracy in exposing non-random generators, but may suffer from reliability issues due to approximations introduced in the test. Here we consider the NIST Frequency Test and present a mathematical expression of the error introduced by approximating the effective discrete distribution function with its continuous limit distribution. The matching against experimental data is almost perfect. © 2008 IEEE

Asymptotic expressions of mismatch variance in interdigitated geometries

Performance in analog integrated circuits strongly depends on the mismatch between nominally identical devices. In this work we derive closed-form asymptotic expressions describing mismatch variance in multifinger structures, under the assumption of Gaussian autocorrelation for the mismatch-generating stochastic process. The analysis is performed on interdigitated geometries, eventually modified to make them common-centroid. Comparison with the numerical results provided by an independent model validates the theoretical expressions presented here

Stability and mismatch robustness of a leakage current cancellation technique

Leakage discharge currents represent one of the most detrimental factors for the maximum hold time in analog sample-and-hold circuits. Apart from the obvious passive solution of enlarging the sampling capacitor, alternatives based on active circuits have been proposed. We focus here on an existing solution which has proven to be effective in reducing the leakage discharge, hence extending the hold time, by a factor of 20. Being based on a feedback circuit built around the hold capacitor, it is paramount to understand its stability properties. This work tries to close the gap by analyzing the closed-loop stability of the nominal circuit. Classical control systems techniques are employed to thoroughly analyze the dynamic behaviour of the feedback circuit, highlighting the detrimental effect of device mismatches

Characterization of multilayer stack parameters from X-ray reflectivity data using the PPM program: measurements and comparison with TEM results

Future hard (10 -100 keV) X-ray telescopes (SIMBOL-X, Con-X, HEXIT-SAT, XEUS) will implement focusing optics with multilayer coatings: in view of the production of these optics we are exploring several deposition techniques for the reflective coatings. In order to evaluate the achievable optical performance X-Ray Reflectivity (XRR) measurements are performed, which are powerful tools for the in-depth characterization of multilayer properties (roughness, thickness and density distribution). An exact extraction of the stack parameters is however difficult because the XRR scans depend on them in a complex way. The PPM code, developed at ERSF in the past years, is able to derive the layer-by-layer properties of multilayer structures from semi-automatic XRR scan fittings by means of a global minimization procedure in the parameters space. In this work we will present the PPM modeling of some multilayer stacks (Pt/C and Ni/C) deposited by simple e-beam evaporation. Moreover, in order to verify the predictions of PPM, the obtained results are compared with TEM profiles taken on the same set of samples. As we will show, PPM results are in good agreement with the TEM findings. In addition, we show that the accurate fitting returns a physically correct evaluation of the variation of layers thickness through the stack, whereas the thickness trend derived from TEM profiles can be altered by the superposition of roughness profiles in the sample image

A Zero-Transient Dual-Frequency Control for Class-E Resonant DC-DC Converters

In this paper, a dual-frequency control method for regulating the output power in class-E resonant DC-DC converters has been introduced. As in the standard ON-OFF control or other recently proposed dual-frequency controls, the approach is based on the ability of the converter to alternately operate in a high- and a low-power state. The proposed solution has a twofold advantage: on the one hand, soft-switching capabilities (i.e., Zero-Voltage and Zero-Voltage-Derivative switching) are preserved in both operating states; on the other hand, it is possible to reduce to zero the transient time required to switch from one state to the other one. The most straightforward consequence is the possibility to increase to very large values the frequency at which the two operating states are switched, up to the same order of magnitude as the main switching frequency of the converter. In this way, the additional ripple introduced by the proposed dual-frequency control can be decreased to a negligible value. The approach has been validated by measurements on a prototype operating between 4 MHz and 8 MHz and in which it has been possible to increase the control frequency up to 500 kHz