Selective Growth of Layered Perovskites for Stable and Efficient Photovoltaics

Perovskite solar cells (PSCs) are promising alternatives toward clean energy because of their high-power conversion efficiency (PCE) and low materials and processing cost. However, their poor stability under operation still limits their practical applications. Here we design an innovative approach to control the surface growth of a low dimensional perovskite layer on top of a bulk three-dimensional (3D) perovskite film. This results in a structured perovskite interface where a distinct layered low dimensional perovskite is engineered on top of the 3D film. Structural and optical properties of the stack are investigated and solar cells are realized. When embodying the low dimensional perovskite layer, the photovoltaic cells exhibit an enhanced PCE of 20.1% on average, when compared to pristine 3D perovskite. In addition, superior stability is observed: the devices retain 85% of the initial PCE stressed under one sun illumination for 800 hours at 50 1 C in an ambient environment

Novel Anthracene HTM Containing TIPs for Perovskite Solar Cells

Recently, perovskite solar cells have been in the spotlight due to several of their advantages. Among the components of PSCs, hole transporting materials (HTMs) re the most important factors for achieving high performance and a stable device. Here, we introduce a new D–π–D type hole transporting material incorporating Tips-anthracene as a π–conjugation part and dimethoxy-triphenylamine as a donor part (which can be easily synthesized using commercially available materials). Through the measurement of various optical properties, the new HTM not only has an appropriate energy level but also has excellent hole transport capability. The device with PEH-16 has a photovoltaic conversion efficiency of 17.1% under standard one sun illumination with negligible hysteresis, which can be compared to a device using Spiro_OMeTAD under the same conditions. Ambient stability for 1200 h shown that 98% of PEH-16 device from the initial PCE was retained, indicating that the devices had good long-term stability

Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors

Abstract—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-end processors can use elaborate techniques like multiple issue, out-of-order execution, speculative execution, value prediction etc. to tolerate high memory latencies, they are often not viable solutions for embedded processors, due to significant area, power and chip complexity overheads. This paper proposes a hardware-software cooperative approach, called priority-based execution to hide cache miss penalty for embedded processors. The compiler classifies the instructions into low-priority and highpriority instructions. The processor executes the high-priority instructions, but delays the execution of low priority instructions. They are executed on a cache miss to hide the cache miss penalty. We empirically evaluate our proposal on the Intel XScale compiler and microarchitecture. Experimental results on benchmarks from Multimedia, MediaBench, MiBench, and SPEC2000 demonstrate an average 17 % performance improvements, hiding 75 % cache miss penalty. I

Novel hole transport materials and optoelectronic devices containing the same

The present invention concerns novel silolothiophene-bridged triphenylamines and related compds. and their use as hole transport materials (HTM), for example in optoelectronic and/or electrochem. devices. These materials are particularly useful in org.-inorg. perovskite-based solid state solar cells. Preferred compds. are:

Dispiro-​oxepine​/thiapine derivatives for optoelectronic semiconductors

The dispiro-oxepine/dispiro-thiapine derivatives for optoelectronic semiconductors is a compound based on a structure having a functionalized dispiro compound of formula (Ia) or (Ib) with the core unit being a seven-membered heterocycle oxepine or thiapine, the derivative being formed by combining (Ia) or (Ib): with two moities selected from K1 and K2: The derivative is used as a hole transporting material in an optoelectronic and/or photoelectrochemical device

ABSTRACT Automatic Generation of Operation Tables for Fast Exploration of Bypasses in Embedded Processors

Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses requires bypass-sensitive compiler. Operation Tables (OTs) have been proposed to perform bypass-sensitive compilation. However, due to lack of automated methods to generate OTs, OTs are currently manually specified by the designer. Manual specification of OTs is not only an extremely time consuming task, but is also highly error-prone. In this paper, we present AutoOT, an algorithm to automatically generate OTs from a high-level processor description. Our experiments on the Intel XScale processor model running MiBench benchmarks demonstrate that AutoOT greatly reduces the time and effort of specification. Automatic generation of OTs makes it feasible to perform full bypass exploration on the Intel XScale and thus discover interesting alternate bypass configurations in a reasonable time. To further reduce the compile-time overhead of OT generation, we propose another novel algorithm, AutoOTDB. AutoOTDBisableto cut the compile-time overhead of OT generation by half. 1

Hole transporting organic molecules containing enamine groups for optoelectronic and photoelectrochemical devices

The present invention relates to a compound of formula (I) based on enamine derivatives and used as organic hole conductors or hole transporting material in an optoelectronic or photoelectrochemical device. The present invention relates to the hole transporting compounds based on enamine derivatives for efficiency perovskite or dye sensitized solar cells and optoelectronic devices, organic light-emitting diode (OLED), field-effect transistors (FET)