2,985 research outputs found

    An analytical model for the threshold voltage of a narrow-width MOSFET

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    Improvement on 1/f noise properties of nitrided n-MOSFET's by backsurface argon bombardment

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    The 1/f noise properties of nitrided n-MOSFET's bombarded by low-energy (550 eV) argon-ion beam are investigated. It is found that after bombardment, 1/f noise, and its degradation under hot-carrier stress are reduced, and both exhibit a turnaround behavior with bombardment time for a given ion energy and intensity. The physical mechanism involved is probably enhanced interface hardness resulting from bombardment-induced stress relief in the vicinity of the oxide/Si interface. Moreover, from the frequency dependence of the noise, it is revealed that the nitrided devices have a nonuniform trap distribution increasing toward the oxide/Si interface which can be modified by the backsurface bombardment.published_or_final_versio

    Interface properties of NO-annealed N2O-grown oxynitride

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    The oxide/Si interface properties of gate dielectric prepared by annealing N2O-grown oxide in an NO ambient are intensively investigated and compared to those of O2-grown oxide with the same annealing conditions. Hot-carrier stressings show that the former has a harder oxide/Si interface and near-interface oxide than the latter. As confirmed by SIMS analysis, this is associated with a higher nitrogen peak concentration near the oxide/Si interface and a larger total nitrogen content in the former, both arising from the initial oxidation in N2O instead of O2.published_or_final_versio

    Dynamic-stress-induced enhanced degradation of 1/f noise in n-MOSFET's

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    AC-stress-induced degradation of 1/f noise is investigated for n-MOSFET's with thermal oxide or nitrided oxide as gate dielectric, and the physical mechanisms involved are analyzed. It is found that the degradation of 1/f noise under ac stress is far more serious than that under dc stress. For an ac stress of VG = 0 approx. 0.5 VD, generations of both interface state (ΔDit) and neutral electron traps (ΔNet) are responsible for the increase of 1/f noise, with the former being dominant. For another ac stress of VG = 0 approx. VD, a large increase of 1/f noise is observed for the thermal-oxide device, and is attributed to enhanced ΔNet and generation of another specie of electron traps, plus a small amount of ΔDit. Moreover, under the two types of ac stress conditions, much smaller degradation of 1/f noise is observed for the nitrided device due to considerably improved oxide/Si interface and near-interface oxide qualities associated with interfacial nitrogen incorporation.published_or_final_versio

    1/f noise in n-channel metal-oxide-semiconductor field-effect transistors under different hot-carrier stresses

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    Degradation mechanisms contributing to increased 1/f noise of n-channel metaloxide-semiconductor field-effect transistors (n-MOSFETs) after different hot-carrier stresses are investigated. It is demonstrated that for any hot-carrier stress, the stress-induced enhancement of 1/f noise is mainly attributed to increased carrier-number fluctuation arising from created oxide traps, while enhanced surface-mobility fluctuation associated with electron trapping at preexisting and generated fast interface states and near-interface oxide traps is also responsible under maximum substrate- and gate-current stresses. Besides thermal-oxide n-MOSFETs, nitrided-oxide devices are also used to further support the above analysis. © 1999 American Institute of Physics.published_or_final_versio

    Electrical properties of different NO-annealed oxynitrides

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    This journal issues contain proceedings of the 2nd International Conference on Amorphous and Crystalline Insulating Thin Films II ... 1998Performances of gate dielectrics prepared by double-nitridation in NO and N2O are investigated. Stronger oxide/Si interface bonding, less charge trapping and larger charge-to-breakdown are observed for such gate dielectrics than singly NO-nitrided gate dielectric. The physical mechanisms behind the findings are attributed to larger nitrogen peak concentration located almost at the oxide/Si interface and total nitrogen content near the oxide/Si interface of these gate dielectrics.postprin

    A comparison between NO-annealed O2- and N2O-grown gate dielectrics

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    Qualities of oxynitrides prepared by annealing O2- and N2O-grown oxides in NO ambient are investigated. Harder oxide/Si interface, less charge trapping and higher charge-to-breakdown characteristics are observed in NO-annealed N2O-grown (N2ONO) oxynitride than NO-annealed O2-grown (O2NO) oxynitride. The involved mechanism lies in higher interfacial nitrogen concentration and total nitrogen content in N2ONO oxynitride than O2NO oxynitride for the same anneal temperature and time.published_or_final_versio

    Effects of nitridation and annealing on interface properties of thermally oxidized SiO2/SiC metal–oxide–semiconductor system

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    The effects of N2O nitridation and subsequent annealing in different conditions on thermally oxidized n-type 6H–silicon carbide (SiC) metal–oxide–semiconductor (MOS) interface properties were investigated. Influence of high-field stress on the MOS system was also studied. The nitrided device annealed in dry or wet O2 is found to have lower interface-state density compared to the device annealed in N2 because the reoxidation can reduce nitridation-induced interface damage. Furthermore, significantly less shift of flatband voltage during high-field stress for all nitrided devices indicates much better oxide reliability by replacing strained Si–O bonds with stronger Si–N bonds during nitridation. This is further supported by the fact that annealing of the nitrided device in dry or wet oxygen slightly reduces the robustness of the oxide. In summary, the O2-annealing conditions have to be optimized to deliver a proper tradoff between interface quality and reliability. © 2000 American Institute of Physics.published_or_final_versio

    Quality improvement of low-pressure chemical-vapor-deposited oxide by N2O nitridation

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    Quality of low-pressure chemical-vapor-deposited (LPCVD) oxide and N2O-nitrided LPCVD (LN2ON) oxide is investigated under high-field stress conditions as compared to thermal oxide. It is found that LPCVD oxide has lower midgap interface-state density Dit-m and smaller stress-induced Dit-m increase than thermal oxide, but exhibits enhanced electron trapping rate and degraded charge-to-breakdown characteristics, which, however, are significantly suppressed in LN2ON oxide, suggesting effective elimination of hydrogen-related species. Moreover, LN2ON oxide shows further improved Si/SiO2 interface due to interfacial nitrogen incorporation. © 1997 American Institute of Physics.published_or_final_versio

    Analysis on accuracy of charge-pumping measurement with gate sawtooth pulses

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    Charge-pumping (CP) measurement is performed on MOSFETs with their gates tied to sawtooth pulses. Influence of both rise time (tr) and fall time (tf) on the CP current of the devices with different channel lengths is investigated at different pulse frequencies. Results show that the dominant mechanism affecting the measurement accuracy is the energy range of interface-trap distribution Dit(E) swept by the gate signal for frequencies below 500 kHz and carrier emission for frequencies above 500 kHz. For frequencies higher than 600 kHz, incomplete recombination could be an additional mechanism when tf is too short. Hence, it is suggested that low frequency is more favorable than high frequency, especially for sawtooth pulses with long tr and short tf , due to little carrier emission and negligible geometric effects even for devices as long as 50 μm. However, if high frequency (e.g. 1 MHz) is required to obtain a sufficiently large S/N ratio in the CP current, sawtooth pulses with equal tr and tf should be chosen for the least carrier emission effect and thus more reliable results on interface-state density, Moreover, for both sawtooth and trapezoidal pulses with a typical amplitude of 5 V, a lower limit of 200 ns for tr and tf is necessary to suppress all the undesirable effects in devices shorter than at least 20 μm.published_or_final_versio
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