101 research outputs found
RF spectrum sensing in CMOS exploiting crosscorrelation
The introduction of new wireless services, the demand for higher datarates,\ud
and higher traffic volumes call for a more efficient use of the RF spectrum\ud
than what is currently possible with static frequency allocation. Dynamic\ud
spectrum access offers a more efficient use by allowing unlicensed users to\ud
opportunistically use locally and temporarily unoccupied licensed bands\ud
(‘white space’).\ud
To prevent harmful interference to the licensed users, unlicensed users\ud
need tomake sure the band is free before they are allowed to transmit. This\ud
means that, if resorting to databases is not possible or desired, the unlicensed\ud
users have to be able to detect very weak signals from the licensed\ud
users by means of spectrum sensing. Different types of spectrum sensing\ud
exist, but it is preferable to use one that does not require knowledge of the\ud
signals to be detected, as it can then be employed in arbitrary frequency\ud
bands. Such a solution is energy detection (ED). The first step of ED is\ud
similar to what a spectrum analyzer (SA) does: measure the power in a\ud
frequency band. The second step is to distinguish between measuring\ud
only noise, or noise plus a signal. Due to inaccuracies in the noise level\ud
estimation, there is a certain minimum signal-to-noise ratio (SNR), the\ud
SNR-wall, below which signals cannot be reliably detected. Several analog\ud
impairments, such as phase noise, nonlinearity, and limited harmonic rejection\ud
(HR), can also hamper the detection process by causing false alarms\ud
or missed detections.\ud
To reduce the SNR-wall and the influence of analog impairments on\ud
sensing performance, crosscorrelation (XC) spectrum sensing, as a generalization\ud
of autocorrelation (AC) (the standard form of ED), is proposed. XC\ud
multiplies and integrates the outputs of two receivers, each processing the\ud
same signal, to obtain the signal power, while the noise (ideally) averages\ud
out. The noise uncertainty is removed at the cost ofmeasurement time, and\ud
the SNR-wall reduces. A mathematical model is developed that predicts\ud
that (1) a lower noise correlation between the two receivers lowers the\ud
SNR-wall, and (2) resistive attenuation at the input of each receiver does\ud
not influence the sensitivity of XC. This allows a design to be optimized for\ud
high linearity without affecting the detection capabilities. By employing\ud
a separate oscillator for each receiver, XC can also reduce phase noise. A\ud
frequency offset between the two oscillators, in combination with some\ud
digital signal processing, also allows XC to improve HR.\ud
A first mostly-discrete prototype is developed, employing a mixer-first\ud
architecture for high linearity. It demonstrates (phase) noise reduction and\ud
an attenuation-independent noise floor using XC, but suffers from external\ud
frequency-dependent coupling between the receivers, crosstalk between\ud
the mixers, and a poor HR. A second protype tackles these disadvantages\ud
by integrating two RF-frontends into a single 1.2V 65nm CMOS-chip,\ud
with a novel distortion-cancellation technique in the attenuators for high\ud
linearity.\ud
Measurements show that XC achieves 22 dB of phase noise reduction\ud
(limited by measurement time), and up to 25 dB of improvement in HR\ud
(limited by crosstalk). At 10 dB attenuation, the SNR-wall is found to be\ud
-184 dBm/Hz, which is 10 dB below the thermal noise floor, and even\ud
12 dB below the measured SNR-wall of AC. XC achieves an attenuationindependent\ud
noise floor < -169 dBm/Hz from 0.3–1.0 GHz, with an IIP3\ud
of +25dBm at 10 dB attenuation, which makes the spurious-free dynamic\ud
range higher than that of high-end commercial SAs. Furthermore, it is experimentally\ud
shown that XC can be much faster and more energy-efficient\ud
than AC.\ud
Overall, XC is shown to enable the integration of SAs with high sensitivity,\ud
good resilience to strong interferers, and with speed and, at low\ud
SNR, energy consumption benefits compared to AC. This not only makes\ud
sensitive spectrum sensing attainable in a hostile radio environment, but\ud
also paves the way for low-cost, low-power, and high-quality (mobile)\ud
measurement equipment. Furthermore, it may enable the integration of\ud
(many) small SAs inside other chips for built-in self-test (BIST), reducing\ud
on pin count and test time during manufacturing, as well as more reliable\ud
and stable performance during operation
Improved Toolchain-Compatible Standard Cells with 5% - 36% Lower EDP for Super Threshold Operation in 65nm Low-Power CMOS Technology
Guest Editorial 2020 Custom Integrated Circuits Conference
THIS Special Issue of the IEEE JOURNAL OF SOLIDSTATE CIRCUITS features expanded versions of key articles presented at the 2020 Custom Integrated Circuits Conference (CICC), one of IEEE’s first conferences to go fully virtual due to the corona virus pandemic, from March 22 to March 25, 2020. Originally planned to be held at Hyatt Boston Harbor, Boston, MA, USA, growing concerns related to COVID-19 and the impact on the community’s ability to travel to the conference lead the conference organization to make the tough decision in January 2020 to go for a fully virtual format
ELITE BMX CYCLISTS USE INDIVIDUAL STRATEGIES FOR A SUCCESSFUL START
A fast start during BMX racing is strongly related to superior performance. The purpose of this study was to identify which aspects of starting technique were related to a further distance after 1 second, an indication of an advantageous starting position. Significant between-cyclists differences were found in set position kinematics and starting technique. Whilst each cyclist had specific aspects of the start related to superior performance, two of the cyclists had strong correlations with vertical velocity of the bicycle at gate drop and at 1 second, indicating the higher the wheel was lifted, the further the distance reached after 1 second. These data provide further insight into how BMX cyclists propel the bicycle from a stationary position to attain an advantageous position as quickly as possible
Inverter Chain Buffer Optimization for N-path Filter Switch Drivers and Validation through Simulations in 22nm FD-SOI Technology
Quantifying the Trade-off between latency and power consumption in Bluetooth Low Energy and its mitigation by Using a Wake-Up Receiver
Need-based learning:an integration of just-in-time-learning, flipped classroom and gamification in a project-based learning setting
- …