17 research outputs found

    Low incidence of SARS-CoV-2, risk factors of mortality and the course of illness in the French national cohort of dialysis patients

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    Comparison between Equilibrium Voltage Step and Charge Pumping Techniques for Characterizing near Si-SiO2 Interface Traps

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    International audienceThe Equilibrium Voltage Step (EVS) technique has been used for extraction of depth and energy concentration profile of traps situated in the oxide of a lightly stressed metal-oxidesemiconductor (MOS) structure. This has been achieved up to the very near Si-SiO2 interface. The results are discussed and compared with those obtained using charge pumping (CP) technique. A good agreement is achieved between the trap densities extracted using the two methods even though differences in the shape of the profiles can be observed. The results also very well agree with those published previously using current deep level transient spectroscopy (C-DLTS)

    Characterizing slow state near Si-SiO 2 in MOS structure

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    International audienceThe Equilibrium Voltage Step (EVS) technique has been used for extraction of depth and energy concentration profile of traps situated in the oxide of a lightly stressed metal-oxide-semiconductor (MOS) structure. This has been achieved up to the very near Si-SiO2 interface. The results are discussed and compared with those obtained using charge pumping (CP) technique. A good agreement is achieved between the trap densities extracted using the two methods even though differences in the shape of the profiles can be observed. The results also very well agree with those published previously using current deep level transient spectroscopy (C-DLTS)

    Modeling of submicronic TMOS

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    We have developed a model of TMOS submicronic with ultra thin oxide layers as small as 4,5-nm in order to study MOSFET's output characteristics and its associated characterization facility for advanced integrated-circuit design are described. This model makes use of the SPICE3F4 simulator and takes in consideration the majority of the physical effects describing the device's real behavior. The validation of our model has provided us with results on the drain current IDS_{\rm DS} versus drain voltage VDS_{\rm DS}. Our analysis and conclusions should be of interest to all who work with VLSI circuit technology
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