Design and simulation of an 8-PSK super regenerative receiver with new phase detection technique

Super Regenerative Receivers exploit more complex modulation techniques in order to achieve better bit per symbol rate. This study presents a novel 8-Phase Shift Keying (PSK) Super Regenerative Receiver operating in the 402–405 MHz, Medical Implant Communication Service (MICS) band. In the proposed architecture, the complexity of the circuit input is reduced by using an enable signal, which produces a quenching current source in the Low Noise Amplifier (LNA) and Super Regenerative Oscillator (SRO) circuit. Furthermore, the receiver uses a new RC-CR network to generate eight equally shifted signals and one Flip-Flop in each path to minimize the amplitude mismatch and the number of components, respectively. This receiver has been designed and simulated in 130 nm Complementary Metal Oxide Semiconductor (CMOS) process. The power consumption of the entire receiver is 119 µW for the input signal of -80 dBm, at the rate of 6 Mbps, and the Energy Per Bit of 19.8 pj/b

A Highly LinearLNA with Noise Cancellation for 5.8–10.6 GHz UWB Receivers

This paper presents a new ultra-wideband LNA which employs the complementary derivative superposition method in noise cancellation structure. A pMOS transistor in weak inversion region is employed for simultaneous second- and third-order distortion cancellation. Source-degeneration technique and two shunt inductors are added to improve the performance at high frequencies. The degeneration inductor resonates at fT/2 and realizes a new input matching technique that widens the bandwidth with decreasing its quality factor and input capacitance, while flattens the input resistance and also improves the 1dB Compression Point. The shunt inductors resonate at the center frequency of the band and improve the effective bandwidth of noise/distortion cancellation technique. This LNA has been designed in a 0.18-μm CMOS process and consumes 8.3 mA from 1.8 V power supply. The chip area is 0.55mm2. The noise figure and voltage gain are 4.48-5.18 dB and 13 dB, respectively. S11 is lower than -13.5 dB over 5.8–10.6 GHz and IIP3 is 14.5–17.5 dBm, IIP2 is 14–15.5 dBm. This technique improves IIP3 more than 9dB