Paracrine IL-2 Is Required for Optimal Type 2 Effector Cytokine Production

IL-2 is a pleiotropic cytokine that promotes the differentiation of Th cell subsets, including Th1, Th2, and Th9 cells, but it impairs the development of Th17 and T follicular helper cells. Although IL-2 is produced by all polarized Th subsets to some level, how it impacts cytokine production when effector T cells are restimulated is unknown. We show in this article that Golgi transport inhibitors (GTIs) blocked IL-9 production. Mechanistically, GTIs blocked secretion of IL-2 that normally feeds back in a paracrine manner to promote STAT5 activation and IL-9 production. IL-2 feedback had no effect on Th1- or Th17-signature cytokine production, but it promoted Th2- and Th9-associated cytokine expression. These data suggest that the use of GTIs results in an underestimation of the presence of type 2 cytokine-secreting cells and highlight IL-2 as a critical component in optimal cytokine production by Th2 and Th9 cells in vitro and in vivo

Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

Effective mobility measurements have been made at 4.2 K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%

Heterogeneous Integration and Fabrication of III-V MOS Devices in a 200mm Processing Environment

We report on the fabrication of MOS capacitors on 200 mm virtual GaAs substrates using a Si CMOS processing environment. The fabricated capacitors were comparable to those processed on bulk GaAs material. Topside contact was made to the GaAs using a novel CMOS compatible self-aligned NiGe contact scheme resulting in a measured contact resistance of 0.26 [ohm sign].cm. Cross-contamination from various III-V substrates was investigated and it was found that by limiting the thermal budget to <= 300C cross-contamination from the outgassing of In, Ga and As could be eliminated. For wet processing the judicious choice of recipe and processing conditions resulted in no significant cross-contamination being detected as determined by TXRF monitoring. This achievement enables III-V device production using state-of-the-art Si processing equipment.Peer reviewe

High FET performance for a future CMOS GeO2-based technology

In Germanium-based metal-oxide-semiconductor field-effect transistors, a high-quality interfacial layer prior to high-kappa deposition is required to achieve low interface state densities and prevent Fermi level pinning. In this letter, the physical and electrical properties of a Ge/GeO2/Al2O3 gate stack are investigated. The GeO2 interlayer grown by radical oxidation and the formation of a germanate (GeAlOX) layer at the interface provide a stable high-quality passivation of the Ge channel. High carrier mobilities (235 cm(2)/V.s for electrons and 265 cm(2)/V.s for holes) are demonstrated for a relatively low 3.7-nm equivalent oxide thickness (EOT), enabling the realization of a high-performance CMOS technology with potential EOT scaling.status: publishe

Ge deep sub-micron HiK/MG pFETs with superior drive compared to Si HiK/MG state-of-the-art reference

This work presents HiK/metal gate Ge MOSFET devices with a conventional layout and made in a complete Si-like process flow. The fabricated pFET long-channel conventional devices equal the best pFET long-channel mobility results obtained elsewhere on ring-shaped devices made with simplified process flows. The hole mobility is significantly above the Si universal, with a peak mobility value of ∼250 cm² (V s)⁻¹. The fabricated nFET devices have electron mobility much lower than the Si universal, as is commonly observed. Also, deep sub-micron Ge pFET devices with gate lengths below 0.2 μm have been made. The implementation of a novel NiSi-like NiGe module is key to obtain deep sub-micron devices with not only a high-mobility channel, but also with an acceptably low series resistance. 0.19 μm deep sub-micron Ge devices with germanided source/drain regions demonstrate that the mobility enhancement observed in long-channel Ge pFETs as compared to Si HiK/metal gate pFETs can indeed result in deep sub-micron Ge devices with a higher drive.status: publishe

III-V Devices for Advanced CMOS

peer reviewe

High hole mobility in 65 nm strained Ge p-Channel field effect transistors with HfO2Gate dielectric

Biaxially-strained Ge p-channel field effect transistors (pFETs) have been fabricated for the first time in a 65 nm technology. The devices are designed to have a reduced effective oxide thickness (EOT) while maintaining minimized short channel effects. Low and high field transport has been studied by in-depth electrical characterization, showing a high hole-mobility that is enhanced by up to 70% in the strained devices. The important role of pocket implants in degrading the drive current is highlighted. Using a judicious implantation scheme, we demonstrate a significant gain in on-current (up to 35%) for nanoscaled strained Ge pFETs. Simultaneous optimization of the gate metal and dielectric, together with the corresponding uniaxial stress engineering, is identified as a promising path for further performance enhancement