Epoch profiles: microarchitecture-based application analysis and optimization

The performance of data-intensive applications, when running on modern multi- and many-core processors, is largely determined by their memory access behavior. Its most important contributors are the frequency and latency of off-chip accesses and the extent to which long-latency memory accesses can be overlapped with useful computation or with each other. In this paper we present two methods to better understand application and microarchitectural interactions. An epoch profile is an intuitive way to understand the relationships between three important characteristics: the on-chip cache size, the size of the reorder window of an out-of-order processor, and the frequency of processor stalls caused by long-latency, off-chip requests (epochs). By relating these three quantities one can more easily understand an application’s memory reference behavior and thus significantly reduce the design space. While epoch profiles help to provide insight into the behavior of a single application, developing an understanding of a number of applications in the presence of area and core count constraints presents additional challenges. Epoch-based microarchitectural analysis is presented as a better way to understand the trade-offs for memory-bound applications in the presence of these physical constraints. Through epoch profiling and optimization, one can significantly reduce the multidimensional design space for hardware/software optimization through the use of high-level model-driven techniques

An Accelerator-Based Wireless Sensor Network Processor in 130 nm CMOS

Networks of ultra-low-power nodes capable of sensing, computation, and wireless communication have applications in medicine, science, industrial automation, and security. Reducing power consumption requires the development of system-on-chip implementations that must provide both energy efficiency and adequate performance to meet the demands of the long deployment lifetimes and bursts of computation that characterize wireless sensor network (WSN) applications. Therefore, this work argues that designers should evaluate the design in terms of average power for an entire workload, including active and idle periods, not just the metric of energy-per-instruction.Engineering and Applied Science

Slitrk5 Mediates BDNF-Dependent TrkB Receptor Trafficking and Signaling

SummaryRecent studies in humans and in genetic mouse models have identified Slit- and NTRK-like family (Slitrks) as candidate genes for neuropsychiatric disorders. All Slitrk isotypes are highly expressed in the CNS, where they mediate neurite outgrowth, synaptogenesis, and neuronal survival. However, the molecular mechanisms underlying these functions are not known. Here, we report that Slitrk5 modulates brain-derived neurotrophic factor (BDNF)-dependent biological responses through direct interaction with TrkB receptors. Under basal conditions, Slitrk5 interacts primarily with a transsynaptic binding partner, protein tyrosine phosphatase δ (PTPδ); however, upon BDNF stimulation, Slitrk5 shifts to cis-interactions with TrkB. In the absence of Slitrk5, TrkB has a reduced rate of ligand-dependent recycling and altered responsiveness to BDNF treatment. Structured illumination microscopy revealed that Slitrk5 mediates optimal targeting of TrkB receptors to Rab11-positive recycling endosomes through recruitment of a Rab11 effector protein, Rab11-FIP3. Thus, Slitrk5 acts as a TrkB co-receptor that mediates its BDNF-dependent trafficking and signaling

Fine-Tuning Roles of Endogenous Brain-Derived Neurotrophic Factor, TrkB and Sortilin in Colorectal Cancer Cell Survival

International audienceBACKGROUND: Neurotrophin receptors were initially identified in neural cells. They were recently detected in some cancers in association with invasiveness, but the function of these tyrosine kinase receptors was not previously investigated in colorectal cancer (CRC) cells. METHODS AND FINDINGS: We report herein that human CRC cell lines synthesize the neural growth factor Brain-derived neurotrophic factor (BDNF) under stress conditions (serum starvation). In parallel, CRC cells expressed high- (TrkB) and low-affinity (p75(NTR)) receptors at the plasma membrane, whereas TrkA and TrkC, two other high affinity receptors for NGF and NT-3, respectively, were undetectable. We demonstrate that BDNF induced cell proliferation and had an anti-apoptotic effect mediated through TrkB, as assessed by K252a, a Trk pharmacologic inhibitor. It suppressed both cell proliferation and survival of CRC cells that do not express TrkA nor TrkC. In parallel to the increase of BDNF secretion, sortilin, a protein acting as a neurotrophin transporter as well as a co-receptor for p75(NTR), was increased in the cytoplasm of primary and metastatic CRC cells, which suggests that sortilin could regulate neurotrophin transport in these cells. However, pro-BDNF, also detected in CRC cells, was co-expressed with p75(NTR) at the cell membrane and co-localized with sortilin. In contrast to BDNF, exogenous pro-BDNF induced CRC apoptosis, which suggests that a counterbalance mechanism is involved in the control of CRC cell survival, through sortilin as the co-receptor for p75(NTR), the high affinity receptor for pro-neurotrophins. Likewise, we show that BDNF and TrkB transcripts (and not p75(NTR)) are overexpressed in the patients' tumors by comparison with their adjacent normal tissues, notably in advanced stages of CRC. CONCLUSION: Taken together, these results highlight that BDNF and TrkB are essential for CRC cell growth and survival in vitro and in tumors. This autocrine loop could be of major importance to define new targeted therapies

Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations

Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Unlike traditional performance oriented applications, sensor network nodes are primarily constrained by operation lifetime, which is limited by power consumption. Advanced CMOS process technologies provide ever increasing transistor density and improved performance characteristics. However, shrinking feature size and decreasing threshold voltages also lead to significant increases in leakage current, which is especially troublesome for applications with significant idle times. This work investigates tradeoffs between leakage and active power for low-throughput applications. We study these issues across a range of process technologies on a computing architecture that provides explicit support for fine-grain leakage-control techniques such as Vdd-gating and adaptive body bias. We present a methodology for selecting design parameters, including choice of process technology, that makes the optimal tradeoff between active power and leakage power for a given workload. Our results show that leakage power will dominate the selection of process technology, and architectures that support advanced leakage control techniques at the circuit level will be essential. We argue that without advanced lowpower architectures future nano-scale process technologies will not be suited for sensor network applications