25 research outputs found

    Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs

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    KINETIC MODELLING OF METHYLENE BLUE DYE ADSORPTION ON CORN COBS IN STATIC AND DYNAMIC MODES

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    The purpose of this work was to study the removal of methylene blue (MB) from aqueous solutions by adsorption on corn cobs in static and dynamic modes. This agricultural by-product was first characterized and then a series of experiments was conducted to highlight the effect of different operating conditions on the adsorption capacity. Batch experiments revealed that adsorption of MB on corn cobs is affected by too acidic medium. Equilibrium data were represented well by a Langmuir isotherm equation with maximum adsorption capacity of 40 mg/g. RL values obtained at different dye concentration indicate that the sorption of MB on corn cobs is favorable. The second-order kinetic model describes perfectly adsorption kinetic data and adsorption may be controlled by external mass transfer followed by intra-particle diffusion mass transfer. The effectiveness of corn cobs biomass in the removal of methylene blue (MB) dye from its aqueous solution was tested by a fixed-bed column adsorption study. The results of dynamic mode were then modelled using Thomas and Yoon-Nelson equations. The results demonstrated that corn cobs are suitable for removal of MB from water using batch as well as fixed bed sorption system

    A design flow and evaluation framework for DPA-resistant instruction set extensions

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    Power-based side channel attacks are a significant security risk, especially for embedded applications. To improve the security of such devices, protected logic styles have been proposed as an alternative to CMOS. However, they should only be used sparingly, since their area and power consumption are both significantly larger than for CMOS. We propose to augment a processor, realized in CMOS, with custom instruction set extensions, designed with security and performance as the primary objectives, that are realized in a protected logic. We have developed a design flow based on standard CAD tools that can automatically synthesize and place-and-route such hybrid designs. The flow is integrated into a simulation and evaluation environment to quantify the security achieved on a sound basis. Using MCML logic as a case study, we have explored different partitions of the PRESENT block cipher between protected and unprotected logic. This experiment illustrates the tradeoff between the type and amount of application-level functionality implemented in protected logic and the level of security achieved by the design. Our design approach and evaluation tools are generic and could be used to partition any algorithm using any protected logic style.Anglai
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