Efficient Journey Planning and Congestion Prediction Through Deep Learning

The advancements of technology continuously rising over the years has seen many applications that are useful in providing users with sufficient information to make better journey plans on their own. However, commuters still find themselves going through congested routes every day to get to their destinations. This paper attempts to delineate the possibilities of improving urban mobility through big data processing and deep-learning models. Essentially, through a predictive model to predict congestion and its duration, this paper aims to develop and validate a functional journey planning mobile application that can predict traffic conditions, allowing road users to make better informed decisions to their travel plans. This paper proposes a Multi-Layered Perceptron (MLP) deep learning model for congestion prediction and supplements a Linear Regression (LR) model to predict its duration. The proposed MLP-LR model performed reasonably well with an accuracy of 63% in predicting an occurrence of congestion. Some critical discussions on further research opportunities stemming from this study is also presented

Leveraging Open-standard Interorganizational Information Systems for Process Adaptability and Alignment: An Empirical Analysis

PurposeThe purpose of this paper is to understand the value creation mechanisms of open-standard inter-organizational information system (OSIOS), which is a key technology to achieve Industry 4.0. Specifically, this study investigates how the internal assimilation and external diffusion of OSIOS help manufactures facilitate process adaptability and alignment in supply chain network.Design/methodology/approachA survey instrument was designed and administrated to collect data for this research. Using three-stage least squares estimation, the authors empirically tested a number of hypothesized relationships based on a sample of 308 manufacturing firms in China.FindingsThe results of the study show that OSIOS can perform as value creation mechanisms to enable process adaptability and alignment. In addition, the impact of OSIOS internal assimilation is inversely U-shaped where the positive effect on process adaptability will become negative after an extremum point is reached.Originality/valueThis study contributes to the existing literature by providing insights on how OSIOS can improve supply chain integration and thus promote the achievement of industry 4.0. By revealing a U-shaped relationship between OSIOS assimilation and process adaptability, this study fills previous research gap by advancing the understanding on the value creation mechanisms of information systems deployment

Chameleon: a Blind Double Trapdoor Hash Function for Securing AMI Data Aggregation

Data aggregation is an integral part of Advanced Metering Infrastructure (AMI) deployment that is implemented by the concentrator. Data aggregation reduces the number of transmissions, thereby reducing communication costs and increasing the bandwidth utilization of AMI. However, the concentrator poses a great risk of being tampered with, leading to erroneous bills and possible consumer disputes. In this paper, we propose an end-to-end integrity protocol using elliptic curve based chameleon hashing to provide data integrity and authenticity. The concentrator generates and sends a chameleon hash value of the aggregated readings to the Meter Data Management System (MDMS) for verification, while the smart meter with the trapdoor key computes and sends a commitment value to the MDMS so that the resulting chameleon hash value calculated by the MDMS is equivalent to the previous hash value sent by the concentrator. By comparing the two hash values, the MDMS can validate the integrity and authenticity of the data sent by the concentrator. Compared with the discrete logarithm implementation, the ECC implementation reduces the computational cost of MDMS, concentrator and smart meter by approximately 36.8%, 80%, and 99% respectively. We also demonstrate the security soundness of our protocol through informal security analysis

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET.

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency.RIGHTS : This article is licensed under the BioMed Central licence at http://www.biomedcentral.com/about/license which is similar to the 'Creative Commons Attribution Licence'. In brief you may : copy, distribute, and display the work; make derivative works; or make commercial use of the work - under the following conditions: the original author must be given credit; for any reuse or distribution, it must be made clear to others what the license terms of this work are

Mechanistic and pathological study of the genesis, growth, and rupture of abdominal aortic aneurysms

Postprint (published version

Device and circuit-level models for carbon nanotube and graphene nanoribbon transistors

Metal-oxide semiconductor field-effect transistor (MOSFET) scaling throughout the years has enabled us to pack million of MOS transistors on a single chip to keep in pace with Moore’s Law. After forty years of advances in integrated circuit (IC) technology, the scaling of silicon (Si) MOSFET has entered the nanometer dimension with the introduction of 90 nm high volume manufacturing in 2004. The latest technological advancement has led to a low power, high-density and high-speed generation of processor. Nevertheless, the scaling of the Si MOSFET below 22 nm may soon meet its’ fundamental physical limitations. This threshold makes the possible use of novel devices and structures such as carbon nanotube field-effect transistors (CNTFETs) and graphene nanoribbon field-effect transistors (GNRFETs) for future nanoelectronics. The investigation explores the potential of these amazing carbon structures that exceed MOSFET capabilities in term of speed, scalability and power consumption. The research findings demonstrate the potential integration of carbon based technology into existing ICs. In particular, a simulation program with integrated circuit emphasis (SPICE) model for CNTFET and GNRFET in digital logic applications is presented. The device performance of these circuit models and their design layout are then compared to 45 nm and 90 nm MOSFET for benchmarking. It is revealed through the investigation that CNT and GNR channels can overcome the limitations imposed by Si channel length scaling and associated short channel effects while consuming smaller channel area at higher current density