PSVDAG: Compact Voxelized Representation of 3D Scenes Using Pointerless Sparse Voxel Directed Acyclic Graphs

This paper deals with the issue of geometry representation of voxelized three-dimensional scenes using hierarchical data structures. These include pointerless Sparse Voxel Octrees that have no pointers on child nodes and allow a compact binary representation. However, if necessary, there is a possibility to reconstruct these pointers for rapid traversing. Sparse Voxel Directed Acyclic Graphs added 32-bit pointers to child nodes and merging of common subtrees, which can be considered lossless compression. By merging common subtrees, no decompression overhead occurs at the time of traversing. The hierarchical data structure proposed herein - the Pointerless Sparse Voxel Directed Acyclic Graph - incorporates the benefits of both - pointerless Sparse Voxel Octrees (by avoiding storing pointers on child nodes) and Sparse Voxel Directed Acyclic Graphs (by allowing the merging of common subtrees due the introduction of labels and callers). The proposed data structure supports the quick and easy reconstruction of pointers by introducing the Active Child Node Count. It also potentially allows Child Node Mask compression of its nodes. This paper presents the proposed data structure and its binary-level encoding in detail. It compares the effectiveness of the representation of voxelized three-dimensional scenes (originally represented in OBJ format) in the proposed data structure with the data structures mentioned above. It also summarizes statistical data providing a more detailed description of the various parameters of the data structure for different scenes stored in multiple resolutions

Intrusion Detection Architecture Utilizing Graphics Processors

With the thriving technology and the great increase in the usage of computer networks, the risk of having these network to be under attacks have been increased. Number of techniques have been created and designed to help in detecting and/or preventing such attacks. One common technique is the use of Intrusion Detection Systems (IDS). Today, number of open sources and commercial IDS are available to match enterprises requirements. However, the performance of these systems is still the main concern. This paper examines perceptions of intrusion detection architecture implementation, resulting from the use of graphics processor. It discusses recent research activities, developments and problems of operating systems security. Some exploratory evidence is presented that shows capabilities of using graphical processors and intrusion detection systems. The focus is on how knowledge experienced throughout the graphics processor inclusion has played out in the design of intrusion detection architecture that is seen as an opportunity to strengthen research expertise

Selective oversampling approach for strongly imbalanced data

Challenges posed by imbalanced data are encountered in many real-world applications. One of the possible approaches to improve the classifier performance on imbalanced data is oversampling. In this paper, we propose the new selective oversampling approach (SOA) that first isolates the most representative samples from minority classes by using an outlier detection technique and then utilizes these samples for synthetic oversampling. We show that the proposed approach improves the performance of two state-of-the-art oversampling methods, namely, the synthetic minority oversampling technique and adaptive synthetic sampling. The prediction performance is evaluated on four synthetic datasets and four real-world datasets, and the proposed SOA methods always achieved the same or better performance than other considered existing oversampling methods

Adaptive Aggregation of Flow Records

This paper explores the problem of processing the immense volume of measurement data arising during network traffic monitoring. Due to the ever-increasing demands of current networks, observing accurate information about every single flow is virtually infeasible. In many cases the existing methods for the reduction of flow records are still not sufficient enough. Since the accurate knowledge of flows termed as "heavy-hitters" suffices to fulfill most of the monitoring purposes, we decided to aggregate the flow records pertaining to non-heavy-hitters. However, due to the ever-changing nature of traffic, their identification is a challenge. To overcome this challenge, our proposed approach - the adaptive aggregation of flow records - automatically adjusts its operation to the actual traffic load and to the monitoring requirements. Preliminary experiments in existing network topologies showed that adaptive aggregation efficiently reduces the number of flow records, while a significant proportion of traffic details is preserved

Multi-Carrier Steganographic Algorithm Using File Fragmentation of FAT FS

Steganography is considered to be not only a science, but also a craft of concealing ongoing communication by hiding messages in unsuspicious cover documents, such as texts, digital images, audio and video sequences. Its essential feature is the constant search for - often exceptionally creative - possibilities of concealing information. In computers, steganography often uses secondary memory and exchangeable memory media utilising file systems. This paper deals with the current state of the issues related to information hiding by means of hard disks, being the most important source of forensic data. This paper focuses on information hiding using the File Allocation Table (FAT) file system. It also proposes a novel multi-carrier algorithm of hiding information in file fragmentation. The algorithm provides flexibility of encoding the information to be hidden and makes steps toward optimization that allows reduction of interference with the current state of the file system, represented by the statistical values of the file fragmentation parameters

Data Flow Computing Model: Application for Parallel Computer Systems Diagnosis

This paper concerns the issue of recovery of a fault-tolerant parallel system without spares. A fault-tolerant system must be able to proceed its operation despite the occurrence of faults. In such a system recovery can be considered as a support function that retains the fault tolerant features of the system. We present here a data flow model that comprises functional blocks and activating signs in accordance with message flow in a parallel system. A fault in a system occurs according to the continuity of message routing providing the communication between processes and enables the fault diagnosis. Messages in a system are generated and processed in message routing