18 research outputs found

    Ground-state cooling of a trapped ion Using long-wavelength radiation

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    We demonstrate ground-state cooling of a trapped ion using radio-frequency (rf) radiation. This is a powerful tool for the implementation of quantum operations, where rf or microwave radiation instead of lasers is used for motional quantum state engineering. We measure a mean phonon number of nÂŻ=0.13(4) after sideband cooling, corresponding to a ground-state occupation probability of 88(7)%. After preparing in the vibrational ground state, we demonstrate motional state engineering by driving Rabi oscillations between the |n=0âź© and |n=1âź© Fock states. We also use the ability to ground-state cool to accurately measure the motional heating rate and report a reduction by almost 2 orders of magnitude compared with our previously measured result, which we attribute to carefully eliminating sources of electrical noise in the system

    Trapped-ion quantum logic with global radiation fields

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    Trapped ions are a promising tool for building a large-scale quantum computer. However, the number of required radiation fields for the realization of quantum gates in any proposed ion-based architecture scales with the number of ions within the quantum computer, posing a major obstacle when imagining a device with millions of ions. Here, we present a fundamentally different approach for trapped-ion quantum computing where this detrimental scaling vanishes. The method is based on individually controlled voltages applied to each logic gate location to facilitate the actual gate operation analogous to a traditional transistor architecture within a classical computer processor. To demonstrate the key principle of this approach we implement a versatile quantum gate method based on long-wavelength radiation and use this method to generate a maximally entangled state of two quantum engineered clock qubits with fidelity 0.985(12). This quantum gate also constitutes a simple-to-implement tool for quantum metrology, sensing, and simulation

    Design, Fabrication, and Experimental Demonstration of Junction Surface Ion Traps

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    We present the design, fabrication, and experimental implementation of surface ion traps with Y-shaped junctions. The traps are designed to minimize the pseudopotential variations in the junction region at the symmetric intersection of three linear segments. We experimentally demonstrate robust linear and junction shuttling with greater than one million round-trip shuttles without ion loss. By minimizing the direct line of sight between trapped ions and dielectric surfaces, negligible day-to-day and trap-to-trap variations are observed. In addition to high-fidelity single-ion shuttling, multiple-ion chains survive splitting, ion-position swapping, and recombining routines. The development of two-dimensional trapping structures is an important milestone for ion-trap quantum computing and quantum simulations.Comment: 9 pages, 6 figure

    Engineering of microfabricated ion traps and integration of advanced on-chip features

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    Atomic ions trapped in electromagnetic potentials have long been used for fundamental studies in quantum physics. Over the past two decades, trapped ions have been successfully used to implement technologies such as quantum computing, quantum simulation, atomic clocks, mass spectrometers and quantum sensors. Advanced fabrication techniques, taken from other established or emerging disciplines, are used to create new, reliable ion-trap devices aimed at large-scale integration and compatibility with commercial fabrication. This Technical Review covers the fundamentals of ion trapping before discussing the design of ion traps for the aforementioned applications. We overview the current microfabrication techniques and the various considerations behind the choice of materials and processes. Finally, we discuss current efforts to include advanced, on-chip features in next-generation ion traps

    Shuttling-based trapped-ion quantum information processing

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    Moving trapped-ion qubits in a microstructured array of radiofrequency traps offers a route toward realizing scalable quantum processing nodes. Establishing such nodes, providing sufficient functionality to represent a building block for emerging quantum technologies, e.g., a quantum computer or quantum repeater, remains a formidable technological challenge. In this review, the authors present a holistic view on such an architecture, including the relevant components, their characterization, and their impact on the overall system performance. The authors present a hardware architecture based on a uniform linear segmented multilayer trap, controlled by a custom-made fast multichannel arbitrary waveform generator. The latter allows for conducting a set of different ion shuttling operations at sufficient speed and quality. The authors describe the relevant parameters and performance specifications for microstructured ion traps, waveform generators, and additional circuitry, along with suitable measurement schemes to verify the system performance. Furthermore, a set of different basic shuttling operations for a dynamic qubit register reconfiguration is described and characterized in detai

    Fault-Tolerant Parity Readout on a Shuttling-Based Trapped-Ion Quantum Computer

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    Quantum error correction requires the detection of errors via reliable measurements of multiqubit correlation operators. As these operations are inherently faulty, fault-tolerant schemes for realizing quantum error correction are required. Recently, a paradigm requiring only minimal resource overhead in the form of “flag” qubits to detect and correct errors has been proposed. We experimentally demonstrate a fault-tolerant weight-4 parity-check measurement scheme, where one additional flag qubit serves to detect errors, which would otherwise proliferate into uncorrectable weight-2 errors onto the qubit register. We achieve a parity measurement fidelity of 92.3(2)%, which increases to 93.2(2)% upon conditioning to the flag readout result, which shows that the measurement scheme intercepts intrinsic errors occurring throughout the sequence. We show that the protocol is capable of reliably intercepting faults by deliberately injecting bit- and phase-flip errors. For holistic benchmarking of the parity measurement scheme, we use an entanglement witnessing scheme requiring a minimal number of measurements to verify genuine six-qubit multipartite entanglement. The demonstrated fault-tolerant parity measurement scheme constitutes the key building block in a broad class of resource-efficient flag-based quantum error correction protocols including topological color codes. Our hardware platform is based on atomic ions stored in a microchip ion trap. The qubit register is dynamically reconfigured via shuttling operations enabling effective full connectivity without operational cross talk, thereby providing key prerequisites underlying fault-tolerant circuit design. These architectural features in combination with the demonstrated approach to flag-based fault-tolerant quantum error correction open up a route toward scalable fault-tolerant quantum computing
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