Four-channel self-compensating single-slope ADC for space environments

A multichannel high-resolution single-slope analogue-to-digital converter (SS ADC) is presented that automatically compensates for process, voltage and temperature variations, as well as for radiation effects, in order to be used in extreme environmental conditions. The design combines an efficient implementation by using a feedback loop that ensures an inherently monotonic and very accurate ramp generation, with high levels of configurability in terms of resolution and conversion rate, as well as input voltage range. The SS ADC was designed in a standard 0.35 μm CMOS technology. Experimental measurements of the performance and stability against radiation and temperature are presented to verify the proposed approach

A Front-End ASIC for a 3-D Magnetometer for Space Applications by Using Anisotropic Magnetoresistors

This paper presents an application-specific integrated circuit (ASIC) aimed for an alternative design of a digital 3-D magnetometer for space applications, with a significant reduction in mass and volume while maintaining a high sensitivity. The proposed system uses magnetic field sensors based on anisotropic magnetoresistances and a rad-hard mixed-signal ASIC designed in a standard 0.35 μm CMOS technology. The ASIC performs sensor-signal conditioning and analogue-to-digital conversion, and handles calibration tasks, system configuration, and communication with the outside. The proposed system provides high sensitivity to low magnetic fields, down to 3 nT, while offering a small and reliable solution under extreme environmental conditions in terms of radiation and temperature.Ministerio de Ciencia e Innovación AYA2011-29967-C05-05, AYA2009-14212-C05-04, AYA2008-06420-C04-0

OWLs: A mixed-signal ASIC for optical wire-less links in space instruments

This paper describes the design of a mixed-signal ASIC for space application and the techniques employed for radiation hardening and temperature effects compensation. The work is part of a planned long-term effort and collaboration between "Instituto de Microelectrónica de Sevilla (IMSE)", "Universidad de Sevilla (US)", and "Instituto Nacional de Técnica Aeroespacial (INTA)" aimed to consolidate a group of experienced mixed-signal space-ASIC designers. The initiative is partially funded by the Spanish National Research Program. The ASIC performs the function of an optical digital transceiver for diffuse-light intra-satellite optical communications. It has been designed in a 0.35μm CMOS technology from austriamicrosystems (ams). The chip has been manufactured and verified from a functional perspective. Radiation characterization is planned for the third quarter of 2012. Power- and temperature-stress tests, as well as life-tests are also planned for this next quarter, and will be carried out by Alter Technology TÜV Nord S.A.U. Given the previous characterization of the technology [1] and the hardening techniques employed in the design and layout, radiation is not expected to be a problem. The specified environmental limits are a pedestal hard limit of 50KRads with the goal of maximizing TID tolerance, SEU and SET LET-thresholds above 70MeV/(mg/cm2), and latchup free behavior up to the same LET limit. Concerning temperature, the specified operation range is from -90 to +125ºC, while the non-operating temperature range is from -135 to +150ºC.Ministerio de Ciencia e Innovación (MICINN) MEIGA AYA2009-14212-C05-04, AYA2008-06420-C04-0