This paper describes the design of a mixed-signal ASIC for space application and the techniques employed for radiation hardening and temperature effects compensation. The work is part of a planned long-term effort and collaboration between "Instituto de Microelectrónica de Sevilla (IMSE)", "Universidad de Sevilla (US)", and "Instituto Nacional de Técnica Aeroespacial (INTA)" aimed to consolidate a group of experienced mixed-signal space-ASIC designers. The initiative is partially funded by the Spanish National Research Program. The ASIC performs the function of an optical digital transceiver for diffuse-light intra-satellite optical communications. It has been designed in a 0.35μm CMOS technology from austriamicrosystems (ams). The chip has been manufactured and verified from a functional perspective. Radiation characterization is planned for the third quarter of 2012. Power- and temperature-stress tests, as well as life-tests are also planned for this next quarter, and will be carried out by Alter Technology TÜV Nord S.A.U. Given the previous characterization of the technology [1] and the hardening techniques employed in the design and layout, radiation is not expected to be a problem. The specified environmental limits are a pedestal hard limit of 50KRads with the goal of maximizing TID tolerance, SEU and SET LET-thresholds above 70MeV/(mg/cm2), and latchup free behavior up to the same LET limit. Concerning temperature, the specified operation range is from -90 to +125ºC, while the non-operating temperature range is from -135 to +150ºC.Ministerio de Ciencia e Innovación (MICINN) MEIGA AYA2009-14212-C05-04, AYA2008-06420-C04-0
