32 research outputs found

    Improved DAC driving scheme for OFDM applications

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    Method for electric field and potential calculations in Hall plates

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    Linearity improvement for the switched-capacitor DAC

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    Computer Aided Design of an Active Notch Filter for HF Band RFID

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    A digital error-averaging technique for pipelined A/D conversion

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    Abstract — Capacitor mismatch is the main source of nonlinearity for pipelined analog-to-digital (A/D) converters. Here a digital erroraveraging technique is presented to greatly reduce this effect. Compared to the conventional circuit, the new approach requires only one extra digital addition. This allows a very simple and compact implementation. On the other hand, the conversion speed is halved because one conversion now requires two clock cycles instead of one. Therefore this technique is most suitable when moderately high speed combined with high resolution is required. Index Terms — Analog signal processing, analog-to-digital conversion, circuit techniques

    ADAPTIVE FRACTIONAL DELAY ESTIMATION WITHOUT LOCK-UP

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    Gradient based algorithms for adaptive estimation of fractional time delay are known to suffer from lock-up phenomena to some extend. This is mainly due to errors in the gradient estimate which are on its term caused by interpolation errors. By studying the expected behavior of a class of stochastic descent algorithms, we are able to show that by replacing derivatives with finite differences, lock-up can be prevented. The approach is validated by deriving a robust estimator which combines subsample accuracy with excellent convergence properties in a computational efficient way. 1

    A digital error-averaging technique for pipelined A/D conversion

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    Comments on "Interstage gain-proration technique for digital-domain multistep ADC calibration"

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    Comments on “Interstage Gain-Proration Technique for Digital-Domain Multistep ADC Calibration”

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    Abstract — In the commented paper, 1 a gain-proration technique is introduced to correct the interstage gain error that occurs when multiple stages of a multistep analog-to-digital converter are calibrated. In this brief, however, it is shown that correction of this interstage gain error is unnecessary for multistage analog-to-digital converter self-calibration. I

    A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC’s

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    Abstract — The accuracy of high-speed DAC’s is limited by dynamic effects such as glitches. Here, a digital calibration technique to compensate this effect is presented. Because of the digital approach, this solution can not be an exact correction of the phenomenon, but a band limited attenuation. The approach consists of adding a (digital) compensation signal to correct the glitch. Both a 2-tap and a 4-tap correction are investigated and it is shown that they can greatly reduce spurs over a bandwidth of 30 % and 60 % of the Nyquist band respectively, provided the glitch energy is known. Next, it is shown how an adaptive calibration with an additional low-speed calibration ADC can be used to estimate the glitch energy. Simulations confirm that the spectral performance can be greatly improved this way. I
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