Resistive Transition Metal Oxide Memory

A process is created at the Rochester Institute of Technology Semiconductor & Microsystems Fabrication Laboratory (SMFL) to create crossbar structures. These structures can be created out of a variety of materials via different patterning methods, and can be used to investigate potential memristive behavior of many different materials. Using the crossbar structure, resistive switching of an Al/TiOx/Al structure is observed

Carbon Hard Mask for Line Width Trimming

Goal: Modify carbon hard mask to minimize reflectivity and enable line-width trimming. Work in conjunction with Master’s thesis work to create an ideal carbon hard mask layer. Determine necessary PECVD parameters for processin

Ferroelectric HfO2 Thin Films

Goal: To enable ferroelectric device research at RIT and to that end: 1.Developing an RIT process for fabrication of ferroelectric HfO2 devices 2.Enabling characterization of said films through set-up of a new ferroelectric test syste

TANOS (TaN, Al2O3, Si3N4, SiO2, Si) Charge-trap Flash Devices

Goal: To demonstrate charge-trapping in a TANOS Stack at RIT Gate stack film depositions determined by experimentation, testing C-V structures fabricated and tested by patterning gate stack with GCA C-V Mask. NMOS charge-trap flash devices currently being fabricated with modified version of AdvCMOS150 Process w/ TANO gate stack

Microelectronic engineering education for emerging frontiers

With the support provided by the National Science Foundation and RIT Provost’s vision for providing flexible curricula, the department of Microelectronic Engineering has instituted new and enhanced program initiatives – (1) offering a semiconductor processing minor for other science and engineering programs promoting access to state-of-the art semiconductor fabrication facilities to students from other programs; (2) crafting a five course elective sequence within the existing curriculum by eliminating legacy material and course consolidation; (3) developing a concentration program in nanotechnology and MEMS; (4) outreach programs for targeting larger and diverse participation in preparing workforce for the nation’s future high tech industry; (5) enhance student learning through co-op and service. The mission is to generate multi faceted work force for the future semiconductor technologies and emerging frontiers spinning off from microelectronics, while simultaneously promoting enrollment particularly from women and minority students

Ion Implantation of Porous Silicon

Investigates the ion implantation of porous silicon (Si). Properties of light-emitting Si; Application of continuous-wave and time dependent photoluminescence spectroscopies; Comparison of dopant implantation effect in varying doses

Analog Content-Addressable Memory from Complementary FeFETs

To address the increasing computational demands of artificial intelligence (AI) and big data, compute-in-memory (CIM) integrates memory and processing units into the same physical location, reducing the time and energy overhead of the system. Despite advancements in non-volatile memory (NVM) for matrix multiplication, other critical data-intensive operations, like parallel search, have been overlooked. Current parallel search architectures, namely content-addressable memory (CAM), often use binary, which restricts density and functionality. We present an analog CAM (ACAM) cell, built on two complementary ferroelectric field-effect transistors (FeFETs), that performs parallel search in the analog domain with over 40 distinct match windows. We then deploy it to calculate similarity between vectors, a building block in the following two machine learning problems. ACAM outperforms ternary CAM (TCAM) when applied to similarity search for few-shot learning on the Omniglot dataset, yielding projected simulation results with improved inference accuracy by 5%, 3x denser memory architecture, and more than 100x faster speed compared to central processing unit (CPU) and graphics processing unit (GPU) per similarity search on scaled CMOS nodes. We also demonstrate 1-step inference on a kernel regression model by combining non-linear kernel computation and matrix multiplication in ACAM, with simulation estimates indicating 1,000x faster inference than CPU and GPU

Luminescence Properties of Thin Film Ta2 Zn3 O8 and Mn Doped Ta2 Zn3 O8

Blue luminescence from TaZZn30g and green luminescence from Mn doped TaZZn30g has been observed under low voltage cathodoluminescent excitation, In this article , the luminescence mechanisms of TaZZn30g and Mn doped TaZZn30 g are discussed in detail. The results suggest that the intrinsic blue luminescence of TaZZn30g results from a metal-to-ligand transition, whereas the green luminescence of Mn doped TaZZn30g results from the Mn 4T 1-6A I transition. The suppression of the blue intrinsic luminescence in Mn doped TaZZn30g suggests that efficient energy transfer from the host material to the Mn occurs. This energy transfer phenomenon is also discussed by comparing the photoluminescence excitation spectra of both thin film materials. Finally, the relative efficiency versus voltage and current density is demonstrated and discussed pertaining to field emission device operation

Three-Terminal Si-Based Negative Differential Resistance Circuit Element with Adjustable Peak-to-Valley Current Ratios Using a Monolithic Vertical Integration

Si-based resonant bipolar transistors are demonstrated by the monolithic vertical integration of Si-based resonant interband tunnel diodes atop the emitter of Si/SiGe heterojunction bipolar transistors ~HBTs! on a silicon substrate. In the common emitter configuration, IC versus VCE shows negative differential resistance characteristics. The resulting characteristics are adjustable peak-to-valley current ratios, including infinite and negative values, and tailorable peak current densities by the control of the HBT base current under room temperature operation. With the integrated RITD-HBT combination, latching properties which are the key operating principle for high-speed mixed-signal, memory, and logic circuitry, are experimentally demonstrated