96 research outputs found

    Inequities in energy-balance related behaviours and family environmental determinants in European children : baseline results of the prospective EPHE evaluation study

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    Background: Tackling inequalities in overweight, obesity and related determinants has become a top priority for the European research and policy agendas. Although it has been established that such inequalities accumulate from early childhood onward, they have not been studied extensively in children. The current article discusses the results of an explorative analysis for the identification of inequalities in behaviours and their determinants between groups with high and low socio-economic status. Methods: This study is part of the Epode for the Promotion of Health Equity (EPHE) evaluation study, the overall aim of which is to assess the impact and sustainability of EPODE methodology to diminish inequalities in childhood obesity and overweight. Seven community-based programmes from different European countries (Belgium, Bulgaria, France, Greece, Portugal, Romania, The Netherlands) participate in the EPHE study. In each of the communities, children aged 6-8 years participated, resulting in a total sample of 1266 children and their families. A parental self-administrated questionnaire was disseminated in order to assess the socio-economic status of the household, selected energy balance-related behaviours (1. fruit and vegetable consumption; 2. soft drink/fruit juices and water consumption; 3. screen time and 4. sleep duration) of the children and associated family environmental determinants. The Mann-Whitney U test and Pearson's chi-square test were used to test differences between the low and high education groups. The country-specific median was chosen as the cut-off point to determine the educational level, given the different average educational level in every country. Results: Children with mothers of relatively high educational level consumed fruits and vegetables more frequently than their peers of low socio-economic status. The latter group of children had a higher intake of fruit juices and/or soft drinks and had higher screen time. Parental rules and home availability were consistently different between the two socio-economic groups in our study in all countries. However we did not find a common pattern for all behaviours and the variability across the countries was large. Conclusions: Our findings are indicative of socio-economic inequalities in our samples, although the variability across the countries was large. The effectiveness of interventions aimed at chancing parental rules and behaviour on health inequalities should be studied

    A protocol and memory manager for on-chip communication

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    We define a protocol for on-chip communication that supports dynamic interconnect networks with global memory management based on the notion of distributed shared memory with a uniform address space. The protocol is implemented by a memory manager. It is beneficial to separate the steady-state processing (data communication with static interconnect) from changing from one steady state (or user function) to another, which may necessitate reallocation of resources or changes in the network topology

    a study on Sri Lankan banking software domain

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    Requirements engineering is an important stage of the software development life cycle. All other phases of development lifecycle are depending on that. Especially the development phase is based on the requirements and therefore requirements should be clearly understood and properly documented. There can be several factors which should be considered within the requirements engineering phase. In this research through the literature review, it has been identified four major factors; they are communication, inadequate/incomplete requirements engineering, requirements prioritization, and requirements documentation. Based on the identified factors, a separate questionnaire has been developed for requirements engineers and software engineers. The questionnaire for requirements engineers is measuring how they are effectively using those factors within the requirements engineering phase and the questionnaire for software engineers is measuring how much impact is there for software development phase by those factors. With the information gathered, the Straussian grounded theory has been used to analyze the data and the final outcome shows that those factors are highly effective in the requirements engineering phase and impacts to the development phase as well

    Embedding hardware description languages in proof systems

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    Procesing system and method for transmiting data.

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    A method for exchanging data between a first and a second functional unit is described, which comprises the following steps: in a first handshake procedure, data is exchanged corresponding to a communication thread (TID) selected by the first functional unit (I), while independently in a second handshake procedure, information relating to a status of at least one communication thread is exchanged from the second (T) to the first functional unit (I). The information enables the first functional unit (I) to anticipate the possibility of exchanging data for the at least one communication thread

    Low-level radioactivity ocean sediment standard reference material

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    [[sponsorship]]地球科學研究所[[note]]已出版;[SCI];有審查制度;不具代表性[[note]]http://gateway.isiknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=Drexel&SrcApp=hagerty_opac&KeyRecord=0969-8043&DestApp=JCR&RQ=IF_CAT_BOXPLO

    Ein Zahn, ein Blatt, ein Tupfer - Multiple Ursachen für Rhinolithiasis

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    Integrated circuit and method for buffering to optimize burst length in networks on chips.

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    An integrated circuit comprising a plurality of processing modules (M, S) coupled by an interconnect means (N) is provided. A first processing module (M) communicates with a second processing module (S) based on transactions. A first wrapper means (WM 1 ) associated to said second processing module (S) buffers data from said second processing module (S) to be transferred over said interconnect means until a first amount of data is buffered and then transfers said first amount of buffered data to said first processing module (M)
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