On the construction of parallel computers from various bases of Boolean functions

The effects of bases of two-input boolean functions are characterised in terms of their impact on some questions in parallel computation. It is found that a certain set of bases (called the P-complete set) which are not necessarily complete in the classical sense, apparently makes the circuit value problem difficult, and renders extended Turing machines and conglomerates equal to general parallel computers. A class of problems called EP arises naturally from this study, relating to the parity of the number of solutions to a problem, in contrast to previously defined classes concerning the count of the number of solutions (#P) or the existence of solutions to a problem (NP). Tournament isomorphism is a member of EP

An improved simulation of space and reversal bounded deterministic turing machines by width and depth bounded uniform circuits

We present an improved simulation of space and reversal bounded Turing machines by width and depth bounded uniform circuits. (All resource bounds hold simultaneously.) An S(n) space, R(n) reversal bounded deterministic k-tape Turing machine can be simulated by a uniform circuit of O(R(n) log2S(n)) depth and O(S(n) k) width. Our proof is cleaner, and has slightly better resource bounds than the original proof due t

A prototype quest generator based on a structural analysis of quests from four mmorpgs

ABSTRACT An analysis of over 750 quests from four popular RPGs (Eve Online, World of Warcraft, Everquest, and Vanguard: Saga of Heroes) reveals that RPG quests appear to share a common structure. We propose a classification of RPG quests based on this structure, and describe a prototype quest generator based on that classification. Our aim is to procedurally generate quests that are complex, multi-leveled, and plausible to players of RPGs. We analyze a nontrivial quest from Everquest and one from our prototype quest generator for comparison

Evaluating player task engagement and arousal using electroencephalography

This paper from the 6th International Conference on Applied Human Factors and Ergonomics and the Affiliated Conference, AHFE 2015 conference proceedings coordinate task engagement data with arousal-valence data for application to expressive transformations to video game play in real time by tuning different performance parameters in an Engagement-Arousal rule system

On Uniformity and Circuit Lower Bounds

Abstract—We explore relationships between circuit complexity, the complexity of generating circuits, and algorithms for analyzing circuits. Our results can be divided into two parts: 1. Lower Bounds Against Medium-Uniform Circuits. Informally, a circuit class is “medium uniform ” if it can be generated by an algorithmic process that is somewhat complex (stronger than LOGTIME) but not infeasible. Using a new kind of indirect diagonalization argument, we prove several new unconditional lower bounds against medium uniform circuit classes, including: • For all k, P is not contained in P-uniform SIZE(n k). That is, for all k there is a language Lk ∈ P that does not have O(n k)-size circuits constructible in polynomial time. This improves Kannan’s lower bound from 1982 that NP is not in P-uniform SIZE(n k) for any fixed k

Experimental Aspects of Synthesis

We discuss the problem of experimentally evaluating linear-time temporal logic (LTL) synthesis tools for reactive systems. We first survey previous such work for the currently publicly available synthesis tools, and then draw conclusions by deriving useful schemes for future such evaluations. In particular, we explain why previous tools have incompatible scopes and semantics and provide a framework that reduces the impact of this problem for future experimental comparisons of such tools. Furthermore, we discuss which difficulties the complex workflows that begin to appear in modern synthesis tools induce on experimental evaluations and give answers to the question how convincing such evaluations can still be performed in such a setting.Comment: In Proceedings iWIGP 2011, arXiv:1102.374

On the power of parallel machines with high-arity instruction sets

We consider various models of parallel computers based on communication networks of sequential processors. The degree of a parallel machine is the number of communication lines connected Lo each processor; the arity is the number of these lines which a processor can actively manipulate at any given time. The emphasis of current research has been placed on constant-arity machines; however, machines with higher arity have occasionally made an appearance. Our aim is to investigate the relative computing power of these high-arity parallel computers. .We present a high-arity model and show that machines with arity and degree A(n) are more powerful than those of arity o(A(n)). Despite this, we are able to show that P(n) processor parallel computers with arity and degree O(1og P(n)) are not much more powerful than those of constant degree, in the sense that they can be efficiently simulated by a practical universal parallel machine