Conception et implémentation d'un réseau composé de quatre VCOs couplés oscillant à 6 GHz

National audienceCe papier décrit la conception et l'implémentation d'un réseau d'oscillateurs couplés totalement intégré en technologie BiCMOS SiGe 0,25 μm. Ce réseau est constitué de quatre VCOs NMOS différentiels couplés au moyen d'une résistance. Pour une tension d'alimentation de 2.5V, une puissance consommée de 125 mW à une fréquence d'oscillation de 6 GHz, le réseau présente un bruit de phase de -127dBc/Hz à 1MHz de la porteuse et un déphasage qui varie de façon continue entre -64° et +64 ° et entre -116° et +116°

Design and Implementation of A 6-GHz Array of Four Differential VCOs Coupled Through a Resistive Network

International audienceThis paper presents the design and the implementation of a fully monolithic coupled-oscillator array, operating at 6 GHz with close to zero coupling phase, in 0.25 μm BICMOS SiGe process. This array is made of four LC-NMOS differential VCOs coupled through a resistor. The single LC-NMOS VCO structure is designed and optimized in terms of phase noise with a graphical optimization approach while satisfying design constraints. At 2.5 V power supply voltage, and a power dissipation of only 125 mW, the coupled oscillators array features a simulated phase noise of -127.3 dBc/Hz at 1 MHz frequency offset from a 6 GHz carrier, giving a simulated phase progression that was continuously variable over the range -64° < Δphi <64 ° and -116° < Δphi < 116°. This constant phase progression can be established by slightly detuning the peripheral array elements, while maintaining mutual synchronization

A multiband radio-frequency energy harvester for self-powered biosensor

This paper presents a novel nano-structure of radio frequency (RF) to direct current (DC) converter for the energy control unit in the biosensor. It is based on the Graëtz Bridge supplied with three-phase power (DP3). This circuit can be considered as the result of the proper combination of a common anode assembly and a common cathode assembly. In fact, the same three-phase converter structure was kept. The diodes have been replaced by six NMOS transistors connected in diodes. A number of capacitors have been added for each stage to boost voltage. The benefit of using this type of circuit is to obtain a powerful DC output signal with the smallest number of stages. The proposed architecture also enables MOS transistors to be driven by external 2.45 GHz voluntary signals originating from the implant's personal assistant. This would allow avoiding the use of transistor control circuits which are already power-consuming. For more power, the proposed converter receives two more involuntary global system for mobile signals (GSM) with 900 MHz and 1800 MHz frequencies bands in order to take advantage of the ambient energy. The proposed RF-DC converter efficiency reaches 62.8% for an input power equal to 10 dbm

Localizing Text in Images and Videos based on Morphology

International audienceMany multifaceted images comprise observable text. If the occurrences of this text can be identified, segmented, and recognized automatically, they will be a prized source of high-level semantics; for retrieval and indexing. In this paper, we will propose a novel method for localizing and detecting text in complex images and video frames based on morphology. A morphological Gardient is generated by computing the variance between the dilation and the erosion image. Then the candidate of regions are connected via a morphological closing operation and every text areas are determined used the occurrence of text in each candidate. The identified text regions are localized perfectly via the projection of the text pixels in the morphological Gardient map. This method is sturdy to different position, character size, color and contrast. The updating of the text region between images is also used to minimize the processing time. Tests are realized on divers images to confirm the good efficient of our method

A new FPGA accelerator based on circular buffer unit per orientation for a fast and optimised GLCM and Texture feature computation

International audienceThis paper presents an FPGA accelerator based on circular buffer unit per orientation for a fast and optimized Gray Level Co-occurrence Matrix (GLCM) and four Texture features computation. The Four texture features namely, contrast, energy, dissimilarity and correlation are computed using Xilinx FPGA. However, the computation of GLCM and four textures features are very complex and consume a lot of execution time. In this paper, an FPGA accelerator for fast computation of GLCM and four texture features are designed and implemented. This architecture was implemented on a Xilinx Zc-702 using Vivado HLS. The obtained results are then compared against other related works. The synthesis results on FPGA prove a significant gain (about 17%) in execution time compared to the previous work

Un CMOS 0.58 mm2 reconfigurable sigma delta CAD para receptor móvil WiMAX

Objective: In this work the design of a fourth-order Reconfigurable Sigma Delta analog-to-digital converter (ΣΔ ADC) for 5MHz, 7MHz or 10MHz channel bandwidths are presented. Materials and methods: Our design technique aims to keep the same ADC architecture in response to multi-band and multi-mode aspects of Mobile WiMAX standard. To this end, we set each sampling frequency corresponding to each channel bandwidth, in order that the same OSR value would be kept for the different channel bandwidths. This technique is intended to optimize the power and area of the ADC that efficiently covers varying channel bandwidths. Moreover, we use the pole placement method to calculate the optimized filter coefficients of Continuous-Time Sigma-Delta (CT ΣΔ) ADC. Results and discussion: Over 5MHz, 7MHz and 10MHz channel bandwidths, the ADC achieved 72.89dB, 67.26dB and 66.47dB peak SNR values, respectively and a dynamic range of 73.5dB, 69.47dB and 66.5dB respectively with only 28mW, 28.2mW and 28.6mW power consumption respectively. Conclusions: The design of the proposed reconfigurable ADC intended for use in the mobile WiMAX standard were achieved. Moreover, the results obtained are satisfactory and are in accordance with theoretical expectations.Objetivo: en este trabajo se presenta el diseño de un convertidor analógico a digital reconfigurable Sigma Delta (ΣΔ CAD) de cuarto orden para anchos de banda de canal de 5MHz, 7MHz o 10MHz. Materiales y métodos: nuestra técnica de diseño tiene como objetivo mantener la misma arquitectura de CAD en respuesta a los aspectos multibanda y multimodo del estándar móvil WiMAX. Para este fin, establecemos cada frecuencia de muestreo correspondiente a cada ancho de banda del canal, para que se mantenga el mismo valor OSR para las diferentes anchuras de banda del canal. Además, utilizamos el método de colocación de polos para calcular los coeficientes de filtro optimizados de Continuous-Time Sigma-Delta (CT ΣΔ) CAD. Resultados y discusión: El ancho de banda de canal de 5MHz, 7MHz y 10MHz alcanzó valores de SNR de pico de 72.89dB, 67.26dB y 66.47dB respectivamente, y un rango dinámico de 73.5dB, 69.47dB y 66.5dB, respectivamente, con solo 28mW, 28.2mW y 28.6mW consumo de energía respectivamente. Conclusiones: Se logró el diseño y la implementación del ADC reconfigurable propuesto para su uso en el estándar móvil WiMAX. Además, los resultados obtenidos son satisfactorios y están de acuerdo con las expectativas teóricas

A 5.9 GHz RF Rectifier for Wireless Power Transmission Applications

International audienc

A fully monolithic 5.8 GHz low phase noise coupled VCO networkfor phased-array systems

International audienc