Electrical properties of extended defects in strain relaxed GeSn

We report the electrical properties of 60 degrees dislocations originating from the +1.2% lattice mismatch between an unintentionally doped, 315 nm thick Ge0.922Sn0.078 layer (58% relaxed) and the underlying Ge substrate, using deep level transient spectroscopy. The 60 degrees dislocations are found to be split into Shockley partials, binding a stacking fault. The dislocations exhibit a band-like distribution of electronic states in the bandgap, with the highest occupied defect state at similar to E-V + 0.15 eV, indicating no interaction with point defects in the dislocation's strain field. A small capture cross-section of 1.5 x 10(-19) cm(2) with a capture barrier of 60 meV is observed, indicating a donor-like nature of the defect-states. Thus, these dislocation-states are not the source of unintentional p-type doping in the Ge0.922Sn0.078 layer. Importantly, we show that the resolved 60 degrees dislocation-states act as a source of leakage current by thermally generating minority electrons via the Shockley-ReadHall mechanism

Mid-IR heterogeneous silicon photonics

In this paper we discuss silicon-based photonic integrated circuit technology for applications beyond the telecommunication wavelength range. Silicon-on-insulator and germanium-on-silicon passive waveguide circuits are described, as well as the integration of III-V semiconductors, IV-VI colloidal nanoparticle films and GeSn alloys on these circuits for increasing the functionality. The strong nonlinearity of silicon combined with the low nonlinear absorption in the mid-infrared is exploited to generate picosecond pulse based supercontinuum sources and optical parametric oscillators that can be used as spectroscopic sensor sources

Long-wavelength silicon photonic integrated circuits

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Epitaxial Growth of GeSn Compounds for Advanced CMOS and PhotonicsApplications

Thanks to their unique crystalline, optical and electrical properties, Ge1-xSnx alloys have emerged as group IV semiconductor materials with potential major impacts on future CMOS and photonic applications. However, the growth of high quality Ge1-xSnxnbsp;is challenged by numerous factors,nbsp;an equilibrium solid solubilitynbsp;Sn in Ge below 1 at.%. This Ph.D. work proposes a novel chemical vapor deposition approach for Ge1-xSnx growth basednbsp;the pioneering combination of two stable commercially-available Ge and Sn precursors, namely Ge2H6 and SnCl4 . This low-temperature atmospheric pressure approach allows the growth of metastable Ge1-xSnx films with substitutionalnbsp;contents as high as 12.4 at.%, whose quality is demonstrated by anbsp;of typical implementations for CMOS and photonic devices. The objective of this thesis isnbsp;On the one hand, this work focuses on the investigation ofnbsp;kinetics and the chemicalnbsp;involvednbsp;the epitaxial growth mechanism ofnbsp;chemical vapornbsp;In this context, Ge2H6 is characterizednbsp;a promising Ge precursor for low temperature chemical vapor deposition and a specific surface reaction is proposed to explain the growth mechanism on H passivated surfaces. For each SnCl4 partial pressure, a minimum critical Ge2H6 partial pressure exists in order to grow continuous monocrystallinenbsp; layers devoid of any phase separation.nbsp;physical origin of such criticalnbsp; partial pressure is thoroughly investigated. In addition, this work aims at gaining a profound understanding of the Ge1-xSnx materials properties.nbsp;X-ray absorption fine structure measurements are used to probe the local environment of Sn atoms in strained and relaxed Ge1-xSnxnbsp;layers with different compositions, revealing that they are covalently bonded to four Ge atoms in a tetrahedral configuration. The analysisnbsp;the crystalline properties ofnbsp;grown layers indicates a positive deviation from Vegard’s law and allows the extraction of a new experimental bowing parameter in agreement with density functional theory predictions. The principal strain relaxation mechanism through whichnbsp;excess strain energy stored in the growing Ge1-xnbsp;layers is relieved is the formation of misfit dislocations at its interface with Ge. However,nbsp;growth of thick strain-relaxed Ge1-xnbsp;layers - which are particularly interesting for their expected direct bandgap and for their ability to induce tensile stress in a Ge overlayer - is complicated by Sn precipitation and by the development of particular island-type features with annbsp;core.1. Introduction 2. Ge1-xSnx growth: challenges and solutions 3. Ge CVD growth with Ge2H6 4. Ge1-xSnx CVD growth with Ge2H6 and SnCl4 5. Crystalline properties, strain relaxation mechanism and island formation 6. EXAFS investigation of Ge1-xSnx layers 7. Conclusions, future work and outlooknrpages: 178status: publishe

Electrical characterization of pGeSn/nGe diodes

I-V characteristics of pGeSn/nGe diodes have been measured and show very good properties. Simulations of the same structure are able to reproduce most of the observed behavior and point to the predominating influence of parameters such as the band gap energy of the GeSn layer. C-V characteristics showing little frequency dependence have also been measured, and their analysis for the determination of the carrier concentration is confirmed by simulations. More investigations, including the effect of temperature and other defects at the interface or in the bulk of either layers are still required in order to explain some of the observed behaviors, notably the reverse saturation current

Impact of traps on the electrical characteristics of GeSn/Ge diodes

Germanium-tin alloys are currently receiving a lot of attention as materials for high performance MOSFET devices. Much interest is focused on the direct band gap for Sn concentrations above 8-10% and the achievement of high mobility values, which can be further increased by the strain due to the lattice mismatch with Ge or Si. GeSn is therefore expected to play a key role in the development of either source and drain stressors for Ge p-MOSFETs or for GeSn channel MOSFETs. However, despite recent tremendous progress in the growth of such materials, the impact of defects at the interface between Ge and GeSn has not been completely characterized. As the processing of diodes contains many of the steps necessary to the fabrication of MOSFET devices, we have investigated the effect of traps on the electrical characteristics of p-GeSn/n-Ge diodes, made from GeSn layers grown by CVD on Ge and in-situ doped with Boron. Using temperature-dependent current-voltage (I-V) and capacitance- voltage (C-V) measurements, we have calculated the ideality factor of the diodes, the activation energy of the reverse saturation current and the carrier concentration of the Ge substrate. In this work, based on the comparison with results obtained from numerical simulations, we discuss these characteristics in view of assessing the extent to which electronic trap states in these heterostructures affect their electrical properties

Identification of deep levels associated with extended and point defects in GeSn epitaxial layers using DLTS

Deep levels associated with extended and point defects in MOS capacitors fabricated on unintentionally doped GeSn epitaxial layers on Ge-on-Si substrates have been studied by Deep Level Transient Spectroscopy (DLTS). A 9nm layer of Al2O3 is deposited as high-k gate dielectric by Molecular Beam Epitaxy. The trap kinetics and origin of defect states is discussed. Also, it is shown that the dislocation cores in relaxed p-Ge are associated with bandlike donor-like states in the lower half of the band gap, and act as carrier trapping and recombination centers. In addition, slow and fast oxide interface traps are observed