Fully ion-implanted InP JFET with buried p-layer

A buried p-layer has been successfully implemented in a fully ion implanted InP JFET for the first time. Using Be co-implanted with Si, a sharp channel profile is obtained. The saturation current has been reduced and the pinch-off characteristic has been improved with a slight decrease in transconductance and cutoff frequency. The equhalent circuits for the JFET with and without the buried p-layer are compared

Three-stage InP JFET amplifier for receiver optoelectronic integrated circuits

Three-stage InP JFET amplifiers have been fabricated on semi-insulating InP using ion implantation. The amplifiers show dc gain of 43-65 calculated from amplifier transfer characteristics. From highfrequency measurements, a 3-dB bandwidth of 400 MHz and a gain of 38 have been measured from the amplifiers.The authors would like to thank R. A. Resta for dielectric depositions, D. Ingersoll and D. DeBlis for help in processing, F. Elizabeth and J. Collis for help in layout of test patterns, and B. C. DeLoach for support and encouragement

High-speed signal switching with a monolithic integrated p-i-n/amp/switch on indium phosphide

Operation of an optoelectronic integrated circuit which includes two p-i-ns, preamplifiers, 2 x 2 crosspoint .switch, and output buffers has been demonstrated. These circuits have been fabricated in semi-insulating 1nP:Fe substrates by vapor phase epitaxy and ion implantation using a planar horizontally integrated technology. Signals modulated at 150 MHz are shown to be switched at 15 MHz, with the circuits capable of detecting and passing data modulated at - 1 GHz