765 research outputs found

    The Changing World of the American Military

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    A Unified Approach to Mixed-Mode Simulation

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    This paper presents a unified approach to mixed-mode simulation. It investigates the algorithms for both logic and circuit simulation, considering their similarities and differences, and a general framework is presented for integrating the two algorithms in uniform manner. The time advance mechanisms and component functional evaluations of the algorithms are show to be similar in nature, and mechanisms for the translation of information represented uniquely in the two algorithms are given. The resulting integrated algorithms is capable of performing mixed-mode simulation, where a circuit is partitioned into discrete and continuous regions, and each region is simulated at the appropriate level. In addition, several of the issues relating to the implementation of mixed-mode simulation on multiprocessors are presented

    Hierarchical Discrete-Event Simulation on Hypercube Architecture

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    This paper presents model of hierarchical discrete-event simulation algorithm running on a hypercube architecture. We assume a static allocation of system components to processors in the hypercube. We also assume a global clock algorithm, with an event-based time increment. Following development of the performance model, we describe an application of the model in the area of digital systems simulation. Hierarchical levels included are gate level (NAND, NOR, and NOT gates) and MSI level (multiplexors, shift registers, etc.). Example values (gathered from simulations running on standard von Neumann architectures) are provided at the model inputs to show the effect of different model parameters and partitioning strategies on the simulation performance

    Collecting Data About Logic Simulation

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    Design of high performance hardware and software based gate-switch level logic simulators requires knowledge about the logic simulation process itself. Unfortunately, little data is publically available concerning key aspects of this process. An example of this is the lack of published empirical measurements relating to the time distribution of events generated by such simulators. This paper presents a gate-switch level logic simulator lsim which is oriented towards the collection of data about the simulation process. The basic components of lsim are reviewed, and its relevant data gathering facilities are discussed. An example is presented which illustrates the use of lsim in gathering data on event distributions and on communications requirements under alternative logic circuit partitionings

    Investigation of long term stability in metal hydrides

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    It is apparent from the literature and the results of this study that cyclic degradation of AB(5) type metal hydrides varies widely according to the details of how the specimens are cycled. The Rapid Cycle Apparatus (RCA) used produced less degradation in 5000 to 10000 cycles than earlier work with a Slow Cycle Apparatus (SCA) produced in 1500 cycles. Evidence is presented that the 453 K (356 F) Thermal Aging (TA) time spent in the saturated condition causes hydride degradation. But increasing the cooling (saturation) period in the RCA did not greatly increase the rate of degradation. It appears that TA type degradation is secondary at low temperatures to another degradation mechanism. If rapid cycles are less damaging than slow cycles when the saturation time is equal, the rate of hydriding/dehydriding may be an important factor. The peak temperatures in the RCA were about 30 C lower than the SCA. The difference in peak cycle temperatures (125 C in the SCA, 95 C in RCA) cannot explain the differences in degradation. TA type degradation is similar to cyclic degradation in that nickel peaks and line broadening are observed in X ray diffraction patterns after either form of degradation

    Inventory test of American government and politics for high school seniors

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    This item was digitized by the Internet Archive. Thesis (Ed.M.)--Boston Universityhttps://archive.org/details/inventorytestofa00hol
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