Performance Estimation for Task Graphs Combining Sequential Path Profiling and Control Dependence Regions

The speed-up estimation of parallelized code is crucial to efficiently compare different parallelization techniques or task graph transformations. Unfortunately, most of the time, during the parallelization of a specification, the information that can be extracted by profiling the corresponding sequential code (e.g. the most executed paths) are not properly taken into account. In particular, correlating sequential path profiling with the corresponding parallelized code can help in the identification of code hot spots, opening new possibilities for automatic parallelization. For this reason, starting from a well-known profiling technique, the Efficient Path Profiling, we propose a methodology that estimates the speed-up of a parallelized specification, just using the corresponding hierarchical task graph representation and the information coming from the dynamic profiling of the initial sequential specification. Experimental results show that the proposed solution outperforms existing approaches

Performance Modeling of Parallel Applications on MPSoCs

In this paper we present a new technique for automatically measuring the performance of tasks, functions or arbitrary parts of a program on a multiprocessor embedded system. The technique instruments the tasks described by OpenMP, used to represent the task parallelism, while ad hoc pragmas in the source indicate other pieces of code to profile. The annotations and the instrumentation are completely target-independent, so the same code can be measured on different target architectures, on simulators or on prototypes. We validate the approach on a single and on a dual LEON 3 platform synthesized on FPGA, demonstrating a low instrumentation overhead. We show how the information obtained with this technique can be easily exploited in a hardware/software design space exploration tool, by estimating, with good accuracy, the speed-up of a parallel application given the profiling on the single processor prototype

Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems

To exploit the power of modern heterogeneous multiprocessor embedded platforms on partitioned applications, the designer usually needs to efficiently map and schedule all the tasks and the communications of the application, respecting the constraints imposed by the target architecture. Since the problem is heavily constrained, common methods used to explore such design space usually fail, obtaining low-quality solutions. In this paper, we propose an ant colony optimization (ACO) heuristic that, given a model of the target architecture and the application, efficiently executes both scheduling and mapping to optimize the application performance. We compare our approach with several other heuristics, including simulated annealing, tabu search, and genetic algorithms, on the performance to reach the optimum value and on the potential to explore the design space. We show that our approach obtains better results than other heuristics by at least 16% on average, despite an overhead in execution time. Finally, we validate the approach by scheduling and mapping a JPEG encoder on a realistic target architecture

Farmland Use Transitions After the CAP Greening: a Preliminary Analysis Using Markov Chains Approach

This paper represents a preliminary attempt to evaluate ex-post impact of the CAP greening payment on farmland use changes, testing by a Markov Chain approach whether farmland use transitions dynamics changed after the introduction of this new policy instrument. Unlike previous contributions, relying on ex-ante simulations, this analysis is based on the actual behaviour of farmers over the period immediately after the last CAP reform. Such ex-post assessment was based on real georeferenced data on farmland allocation, collected in the Lombardy Region, in Northern Italy, over the period 2011-2016. As the current CAP has recently entered in force (in 2015), the present analysis covers the \ufb01rst two years of implementation of the new rules along with the previous four years. Results are in line with previous ex-ante simulations in the same region, detecting a deep discontinuity for those farmland uses characterised by monoculture before the introduction of the greening. They show a signi\ufb01cant discontinuity of farmland use transitions in the reference area after the introduction of greening rules, pointing to a decrease in maize monoculture, in favour of other cereals and legume crops like soybean and alfalfa. Unlike some critical opinions that see current greening rules as a \u201clow pro\ufb01le\u201d compromise, the present analysis points to a strong e\ufb00ect of such rules on regions with high-intensity agriculture

Modeling Resolution of Resources Contention in Synchronous Data Flow Graphs

Synchronous Data Flow graphs are widely adopted in the designing of streaming applications, but were originally formulated to describe only how an application is partitioned and which data are exchanged among different tasks. Since Synchronous Data Flow graphs are often used to describe and evaluate complete design solutions, missing information (e.g., mapping, scheduling, etc.) has to be included in them by means of further actors and channels to obtain accurate evaluations. To address this issue preserving the simplicity of the representation, techniques that model data transfer delays by means of ad-hoc actors have been proposed, but they model independently each communication ignoring contentions. Moreover, they do not usually consider at all delays due to buffer contentions, potentially overestimating the throughput of a design solution. In this paper a technique to extend Synchronous Data Flow graphs by adding ad-hoc actors and channels to model resolution of resources contentions is proposed. The results show that the number of added actors and channels is limited but that they can significantly increase the Synchronous Data Flow graph accuracy