16 research outputs found

    Size Reduction and Harmonics Suppression in Microwave Power Dividers: A Comprehensive Review

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    In this paper, several types of microstrip power divider are studied and compared in terms of harmonics suppression and size reductions. The importance of this research lies in the fact that power dividers are critical components in various communication systems, and their performance directly affects the overall system efficiency. The conventional structure of the power divider has an acceptable performance at operating frequency in terms of excellent output ports isolation, low insertion loss, and high return loss, but occupies large size and passes unwanted signals at higher frequencies along with desired signal without any suppression. Harmonics are popular distortion and has different distortion impacts in many different facilities. Recently, several techniques are introduced to overcome these drawbacks. Applied open stubs, applied resonators, lumped reactive components such as capacitors and inductors, coupled lines, defected ground structure (DGS), and electronic band gaps are common methods, which are widely used to overcome these drawbacks. Finally, the study results show that the resonator-based power dividers and coupled-line-based power dividers have good performances in terms of size reduction and harmonic suppression but increase insertion loss parameter. Furthermore, the lumped reactive component-based power dividers and applied DGS and electromagnetic bandgap cells suppress unwanted harmonics, but they need extra process to fabrication, which is undesirable. Moreover, the open-stub-based power dividers have moderate performance with simple structure, but size reduction and harmonics suppression are not so superior in this method

    Design of a 2 × 1 multiplexer with a ring resonator based on 2D photonic crystals

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    Multiplexers are widely used logic circuits that connect a number of inputs to an output. These circuits are used to create logic functions. This article designs and simulates a 2 × 1 multiplexer based on 2D photonic crystals. The structure of this multiplexer includes dielectric rods in an air background. At the input, there is a ring resonator between two waveguides. This multiplexer’s structure is relatively small, with 14 × 15 rods. The operating wavelength of this logic circuit is 1.55 μm, which falls within the photonic band gap. The PWE method was used to simulate the band structure, and the FDTD numerical calculation method was used to calculate time

    Calculation of short optical pulses by using two sections passive Q-switching diode laser

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    Kako bi se dobili optički impulsi visoke frekvencije, širina impulsa mora biti vrlo kratka. U praktičnim sustavima pasivno Q-uključivanje se smatra jednom od glavnih metoda za generiranje kratkih optičkih impulsa. U metodi pasivnog Q-uključivanja optički se impulsi generiraju parametrima lasera i stoga eksterni električni ili optički modulatori nisu potrebni za generiranje optičkih impulsa. To se smatra prednošću metode pasivnog Q-uključivanja u usporedbi s drugim metodama. U ovom se radu predlaže pasivni diodni laser Q-uključivanja s dva dijela. U predloženoj se metodi brzina promjene prijenosnika postiže u dva područja rješavanjem jednadžbi. Isto tako, primjenom ovog mehanizma opisuje se generiranje impulsa. Nadalje, postiže se širina impulsa i pokazuje da širina impulsa ovisi o fizikalnim parametrima lasera.In order to attain the optical pulses with high frequency, the pulse-width must be very short. In practical systems, passive Q-switching is mainly regarded as one of the main methods to generate the short optical pulses. In passive Q-switching method, the optical pulses are generated by using laser parameters and therefore, the external electrical or optical modulators are not required to generate the optical pulses. This issue is regarded as the advantage of the passive Q-switching method compared to the other methods. In this paper, a model for two-section passive Q-switching diode laser is proposed. In the suggested method, the changing rates of the carriers are obtained in two regions by solving the equations. As well, by applying this mechanism, the pulse generation is described. Furthermore, the pulse width is achieved and it is demonstrated that the pulse width depends on the physical parameters of the laser

    Design and Simulation of Linear All-Optical Comparator Based on Square-Lattice Photonic Crystals

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    An optical comparator is an important logic circuit used in digital designs. Photonic crystals are among the platforms for implementing different kinds of gates and logic circuits, and they are structures with alternating refractive indices. In this paper, an optical comparator is designed and simulated based on a square lattice photonic crystal. In the design of this comparator, a small-sized structure is used. The simulation results show that in the proposed comparator, there is a high difference between logical values “0” and “1”, which are defined based on the optical power level. Due to the small size of this comparator and the adequate difference between logical values “0” and “1”, this structure suits photonic integrated circuits with high accuracy. The proposed structure footprint is 149.04 µm2, and the calculated rise time for this circuit is less than 0.4 ps

    Design and Simulation of Linear All-Optical Comparator Based on Square-Lattice Photonic Crystals

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    An optical comparator is an important logic circuit used in digital designs. Photonic crystals are among the platforms for implementing different kinds of gates and logic circuits, and they are structures with alternating refractive indices. In this paper, an optical comparator is designed and simulated based on a square lattice photonic crystal. In the design of this comparator, a small-sized structure is used. The simulation results show that in the proposed comparator, there is a high difference between logical values “0” and “1”, which are defined based on the optical power level. Due to the small size of this comparator and the adequate difference between logical values “0” and “1”, this structure suits photonic integrated circuits with high accuracy. The proposed structure footprint is 149.04 µm2, and the calculated rise time for this circuit is less than 0.4 ps

    Solving multi-processor task scheduling problem using a combinatorial evolutionary algorithm

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    Scheduling problem in multiprocessor, parallel and distributed systems are placed in NP-hard problems arena. These scheduling problems are employed in different important applications such as information processing, whether forecasting, image processing, database systems, process control, economics, operation research, and other areas. The data for these applications should be disseminated on different processors. Consequently efficient communication and well-organized assignments of jobs to processors are our concerns in solving multiprocessor task scheduling problems. This paper presents a new scheduling method which uses a local search technique. This local search algorithm is a combinatorial algorithm which combines Shuffled Frog Leaping (SFL), and Civilization and Society algorithms (CSA). This local search technique is a general algorithm which has been used to solve other problems such as the TSP before this. In addition to this combinatorial local search algorithm, a heuristic method is used to increase convergence speed of the genetic algorithm. Simulation results show that the proposed combinatorial method works better than other well known scheduling approaches

    Design of a patch power divider with simple structure and ultra-broadband harmonics suppression

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    This paper introduces a simple H-shaped patch Wilkinson power divider (WPD), which provides ultra wide harmonics suppression band. The presented WPD designed at 1.8 GHz, and exhibits good performance at the operating bandwidth. In the proposed divider structure, two simple patch low-pass filters (LPFs) are employed at each branch, and three open ended stubs are added at each port. The proposed divider, implemented using the aforementioned structures has a good performance at both higher frequencies, and the operating frequency. In particular, the designed divider provides an ultra wide suppression band from 3 GHz to 20 GHz, which encompasses the 2nd up to the 11th harmonic. The proposed WPD has an operating band from 1.62 GHz to 2.1 GHz, with the operating bandwidth exceeding 480 MHz. Consequently, the fractional bandwidth (FBW) of 25.8 percent is obtained. The results indicate jS11j, jS12j, jS22j, and jS23j, are equal to -17 dB, -3.5 dB, -20 dB, and -17 dB, respectively, at the operating frequency. The simulation results are corroborated through the measurements of the fabricated divider prototype. The superior harmonic suppression capability is also demonstrated through comparisons with state-of-the-art divider circuits from the literature

    A Wilkinson power divider with harmonic suppression through low-pass filter for GSM and LTE applications

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    Abstract Conventional Wilkinson power dividers (WPDs) perform satisfactorily near the intended operation frequency. Nonetheless, these WPDs demonstrate subpar performance in the stopband and necessitate a significant physical space. To enhance the existing level of advancement and in order to improve on the current state-of-the-art, a modified WPD is designed and fabricated, demonstrating a significant improvement in stopband and superior isolation between output ports. To improve the stopband and suppress unwanted harmonics, a low-pass filter (LPF) structure is placed in the both branches of the conventional WPD. The proposed modified WPD depicts a wide stopband bandwidth (f SB > 17.25 GHz) from 2.75 to over 20 GHz with an attenuation level of 20 dB, suppressing 2nd to 11th harmonics. According to measured results, the input return loss (|S11|), insertion loss (|S21|) and output isolation (|S32|) at f = 1.8 GHz are better than 33 dB, 3.2 dB and 21 dB, respectively. Indeed, the proposed modified WPD exhibits a magnitude imbalance of 0.00018, a phase imbalance of 1.25 degrees and a group delay of 0.5 ns. The proposed WPD depicts a compact size of 35 mm × 25 mm (0.38 λg × 0.27 λg), where λg is the guided wavelength at f = 1.8 GHz. There is a good agreement between the simulated and measured results. According to the obtained results, the proposed modified WPD shows a desirable performance for modern LTE and GSM communication applications
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