Principals’ Transformational and Transactional Leadership Style and Job Satisfaction of College Teachers

Leadership style is the general way a leader behaves towards his subordinates for attaining objectives. There are two major dimensions of leadership i.e. transformational leadership and transactional leadership.The objective of the present study was to find out the relationship between leadership styles of principals and job satisfaction of college teachers. In this connection, survey research method was used.The population for this study comprised all teachers of public degree colleges of Punjab (One of the provinces of Pakistan). By using random sampling technique 10 % of the colleges were taken as sample. There were 43 colleges excluding the mixed colleges and from sample colleges five teachers from each college were selected as sample. For collecting data from teachers two questionnaires were used.One questionnaire was used by the researchers for teachers to rate leadership styles of their heads. This questionnaire was based upon seven indicators. The first four variables dealt with the transformational leadership style and last three variables dealt with the transactional leadership style. The second questionnaire (MSQ) was adopted to know job satisfaction of teachers.Pearson r and t-test were used to analyze the data. The findings of the study show that there is a significant relationship between leadership style and job satisfaction. Relationship among transformational leadership style, transactional leadership style and job satisfaction exist. However, there is a significant relationship between transformational leadership style and job satisfaction. Keywords: Leadership Styles, Transformational leadership, Transactional leadership, Job Satisfaction

Multi-domain crankback operation for IP/MPLS & DWDM networks

Network carriers and operators have built and deployed a very wide range of networking technologies to meet their customers needs. These include ultra scalable fibre-optic backbone networks based upon dense wavelength division multiplexing (DWDM) solutions as well as advanced layer 2/3 IP multiprotocol label switching (MPLS) and Ethernet technologies as well. A range of networking control protocols has also been developed to implement service provisioning and management across these networks. As these infrastructures have been deployed, a range of new challenges have started to emerge. In particular, a major issue is that of provisioning connection services between networks running across different domain boundaries, e.g., administrative geographic, commercial, etc. As a result, many carriers are keenly interested in the design of multi-domain provisioning solutions and algorithms. Nevertheless, to date most such efforts have only looked at pre-configured, i.e., static, inter-domain route computation or more complex solutions based upon hierarchical routing. As such there is significant scope in developing more scalable and simplified multi-domain provisioning solutions. Moreover, it is here that crankback signaling offers much promise. Crankback makes use of active messaging techniques to compute routes in an iterative manner and avoid problematic resource-deficient links. However very few multi-domain crankback schemes have been proposed, leaving much room for further investigation. Along these lines, this thesis proposes crankback signaling solution for multi-domain IP/MPLS and DWDM network operation. The scheme uses a joint intra/inter-domain signaling strategy and is fully-compatible with the standardized resource reservation (RSVP-TE) protocol. Furthermore, the proposed solution also implements and advanced next-hop domain selection strategy to drive the overall crankback process. Finally the whole framework assumes realistic settings in which individual domains have full internal visibility via link-state routing protocols, e.g., open shortest path first traffic engineering (OSPF-TE), but limited \u27next-hop\u27 inter-domain visibility, e.g., as provided by inter-area or inter-autonomous system (AS) routing protocols. The performance of the proposed crankback solution is studied using software-based discrete event simulation. First, a range of multi-domain topologies are built and tested. Next, detailed simulation runs are conducted for a range of scenarios. Overall, the findings show that the proposed crankback solution is very competitive with hierarchical routing, in many cases even outperforming full mesh abstraction. Moreover the scheme maintains acceptable signaling overheads (owing to it dual inter/intra domain crankback design) and also outperforms existing multi-domain crankback algorithms.\u2

Within-Die Delay Variation Measurement And Analysis For Emerging Technologies Using An Embedded Test Structure

Both random and systematic within-die process variations (PV) are growing more severe with shrinking geometries and increasing die size. Escalation in the variations in delay and power with reductions in feature size places higher demands on the accuracy of variation models. Their availability can be used to improve yield, and the corresponding profitability and product quality of the fabricated integrated circuits (ICs). Sources of within-die variations include optical source limitations, and layout-based systematic effects (pitch, line-width variability, and microscopic etch loading). Unfortunately, accurate models of within-die PVs are becoming more difficult to derive because of their increasingly sensitivity to design-context. Embedded test structures (ETS) continue to play an important role in the development of models of PVs and as a mechanism to improve correlations between hardware and models. Variations in path delays are increasing with scaling, and are increasingly affected by neighborhood\u27 interactions. In order to fully characterize within-die variations, delays must be measured in the context of actual core-logic macros. Doing so requires the use of an embedded test structure, as opposed to traditional scribe line test structures such as ring oscillators (RO). Accurate measurements of within-die variations can be used, e.g., to better tune models to actual hardware (model-to-hardware correlations). In this research project, I propose an embedded test structure called REBEL (Regional dELay BEhavior) that is designed to measure path delays in a minimally invasive fashion; and its architecture measures the path delays more accurately. Design for manufacture-ability (DFM) analysis is done on the on 90 nm ASIC chips and 28nm Zynq 7000 series FPGA boards. I present ASIC results on within-die path delay variations in a floating-point unit (FPU) fabricated in IBM\u27s 90 nm technology, with 5 pipeline stages, used as a test vehicle in chip experiments carried out at nine different temperature/voltage (TV) corners. Also experimental data has been analyzed for path delay variations in short vs long paths. FPGA results on within-die variation and die-to-die variations on Advanced Encryption System (AES) using single pipelined stage are also presented. Other analysis that have been performed on the calibrated path delays are Flip Flop propagation delays for both rising and falling edge (tpHL and tpLH), uncertainty analysis, path distribution analysis, short versus long path variations and mid-length path within-die variation. I also analyze the impact on delay when the chips are subjected to industrial-level temperature and voltage variations. From the experimental results, it has been established that the proposed REBEL provides capabilities similar to an off-chip logic analyzer, i.e., it is able to capture the temporal behavior of the signal over time, including any static and dynamic hazards that may occur on the tested path. The ASIC results further show that path delays are correlated to the launch-capture (LC) interval used to time them. Therefore, calibration as proposed in this work must be carried out in order to obtain an accurate analysis of within-die variations. Results on ASIC chips show that short paths can vary up to 35% on average, while long paths vary up to 20% at nominal temperature and voltage. A similar trend occurs for within-die variations of mid-length paths where magnitudes reduced to 20% and 5%, respectively. The magnitude of delay variations in both these analyses increase as temperature and voltage are changed to increase performance. The high level of within-die delay variations are undesirable from a design perspective, but they represent a rich source of entropy for applications that make use of \u27secrets\u27 such as authentication, hardware metering and encryption. Physical unclonable functions (PUFs) are a class of primitives that leverage within-die-variations as a means of generating random bit strings for these types of applications, including hardware security and trust. Zynq FPGAs Die-to-Die and within-die variation study shows that on average there is 5% of within-Die variation and the range of die-to-Die variation can go upto 3ns. The die-to-Die variations can be explored in much further detail to study the variations spatial dependance. Additionally, I also carried out research in the area data mining to cater for big data by focusing the work on decision tree classification (DTC) to speed-up the classification step in hardware implementation. For this purpose, I devised a pipelined architecture for the implementation of axis parallel binary decision tree classification for meeting up with the requirements of execution time and minimal resource usage in terms of area. The motivation for this work is that analyzing larger data-sets have created abundant opportunities for algorithmic and architectural developments, and data-mining innovations, thus creating a great demand for faster execution of these algorithms, leading towards improving execution time and resource utilization. Decision trees (DT) have since been implemented in software programs. Though, the software implementation of DTC is highly accurate, the execution times and the resource utilization still require improvement to meet the computational demands in the ever growing industry. On the other hand, hardware implementation of DT has not been thoroughly investigated or reported in detail. Therefore, I propose a hardware acceleration of pipelined architecture that incorporates the parallel approach in acquiring the data by having parallel engines working on different partitions of data independently. Also, each engine is processing the data in a pipelined fashion to utilize the resources more efficiently and reduce the time for processing all the data records/tuples. Experimental results show that our proposed hardware acceleration of classification algorithms has increased throughput, by reducing the number of clock cycles required to process the data and generate the results, and it requires minimal resources hence it is area efficient. This architecture also enables algorithms to scale with increasingly large and complex data sets. We developed the DTC algorithm in detail and explored techniques for adapting it to a hardware implementation successfully. This system is 3.5 times faster than the existing hardware implementation of classification.\u2

Solvent Effect (NMP and DCM) on Morphology and C02/CH4 Separation Performance of Asymmetric Polysulfone Membranes.

Performance of a membrane is strongly influenced by the morphology ofthe membrane itself. The choice ofthe solvent used is very critical process. The objectives of this project is to study the effect of solvents which are DCM (dichloromethane) and NMP (N-methyl pyrrolidone) in membrane preparation on the morphologies ofmembrane and its relation to carbon dioxide and methane separation characteristic. Membrane will be fabricated using wet phase inversion technique. The polymer used is polysulfone (PSF) while the non-solvents are ethanol and water and were chosen on the basis of the solubility parameter map. The membranes will be characterized in term of the crosssectional morphology as well as the gas permeability. Characterization will be conducted by using SEM to analyse the morphology, FTIR to measure molecular interactions and UTM to measure the mechanical properties. Gas permeation unit will be used to evaluate the performance of membrane by applying different feed pressure. The performance ofmembranes will be evaluated by measuring C02 and CH4 permeances as well as CO2/CH4 ideal selectivity. Therefore, the understanding of mechanism of membrane formation is very crucial in order to produce desirable morphology that leads to enhancement of the membrane performance in pure gas separation process

Determination of delay in burn around time (TAT) of stat tests and its causes: an AKUH experience.

Abstract Objective: To evaluate the delay and reasons of delay of turnaround time (TAT) of stat tests in the section of clinical chemistry of the clinical laboratory. Setting: Clinical Laboratory, Aga Khan University Hospital, Karachi. Patients and Methods: In our study turn around time (TAT) of stat tests were analyzed. Turn around time was specified as the time from receipt of the sample till the final verification of results (sample receipt time to result verification time). Delays were categorized into 15 minutes, 16-30 minutes, 31 to 60 minutes and \u3e60 minutes. It was also noted as to which time of the day was delay in reporting stat results occurred. Reasons for the delay were also looked ihto. Results: Total 20079 stat samples were received from August 2001 till October 2001. Four hundred eight (2.03%) samples were reported after the acceptable turnaround time. Cumulative analysis of the excess TAT of stat tests showed that 0-15 minutes delay was noted in 68 (16.7%) samples, 16-30 minutes delay in 80(19.6%) samples, 31-60 minutes delay in 76 (18.6%) samples and more than 60 minutes delay in 185 (45.3%) of samples. Most of the delay in reporting of stat test in three months time was surprisingly noted in the morning shift. Overall delay in reporting in morning shift was found to be of 242 (59.3 %) samples. In the evening and night shift 83 (20.3%) and 82 (20.1%) samples respectively were found to be delayed. Reasons for delay in TAT were as follows: n = 163 (40%) due to machine breakdown, n=147(36 %) due to delay in the maintenance of analyzers, n=73 (18 %) due to overlook of the staff during shift change (e.g. night shift to morning shift) and n= 25 (6%) due to computer shutdown. Conclusion: We conclude that most of the delay in TAT of stat tests in our laboratory occurred for more than 60 minutes and was frequently seen in the morning shift. It was also noticed that machine breakdown was the most common reason for this delay. Regular audit of such data helps in the evaluation of the efficiency of the laboratory and hence corrective measures taken accordingly would be helpful in providing better service to the physicians and patients (JPMA 53:65;2003)

Acute abdomen in pregnancy, not to forget twisted ovarian cyst: a case report

Aim of the study was to present a case of acute abdomen in pregnancy with twisted ovarian cyst which is a rare entity. A primigravida with period of gestation 25 weeks presented to casualty with acute abdomen. Her USG Doppler revealed findings of ovarian mass of around 9 by 6 cm which underwent torsion. Patient was taken up for emergency laparatomy. Per operatively right sided tubo-ovarian mass-9×8×5 cm, dumbell shaped, fleshy, hemorrhagic and necrosed with one twist over the pedicle seen separate from the uterus. Left side tubes and ovaries seen normal, uterus-26-week size. Frozen section revealed benign pathology. Postoperatively patient was done well and delivered a healthy baby at term via cesarean section. High index of suspicion, regular antenatal follow up and analysis of related risk factors, early and prompt diagnosis and timely intervention in cases of ovarian torsion in pregnancy can change feto-maternal outcome. Meticulous planning and timely intervention under multidisciplinary care team at a tertiary care centre reduces feto-maternal morbidity and mortality

Pengelolaan Modal Kerja Pada Sistem Pengendalian Persediaan Untuk Meminimalisasi Resiko Overstock Barang Secara Efektif Dan Efisien Terhadap PT. Master Print

Modal kerja berperan penting dalam operasional maupun investasi untul kemajuan perusahaan, maka dari itu,  perusahaan berusaha memenuhi kebutuhan modal dengan cara memaksimalkan perolehan labanya. Dari pada itu, persediaan juga berperan penting bagi operasional perusahaan untuk merencanakan sistem untuk mengendalikan persediaan dan mewakili terhadap keseluruhan modal. Tujuan daripada daiadakannya penelitian adalah guna memahami bagaimana pengelolaan modal pekerjaan pada PT. Master Print dan cara untuk meminimalisasi resiko overstock dan mengurangi beban hutang. Metode penelitan yang digunakan yaitu mengobservasi ke lokasi perusahaan, dan melakukan wawancara secara garis besar yang dibahas dan data dokumentasi sebagai sumber data dari perusahaan. Berdasarkan hasil penelitian, pada periode 2018 - 2020, keuntungan PT. Master Print mengalami peningkatan secara signifikan dimulai dari tingkat profitabilitas yang cukup baik, perputaran persediaan yang cukup efisien, dan tingkat nilai nominal dari laba sehingga perusahaan sanggup membayar hutang dagangnya. Kesimpulan yang didapat bahwa modal kerja diperoleh dari hasil keuntungan kegiatan usaha yang lalu dan untuk meminimalisasi overstock dan beban hutang dengan cara membatasi pembelian dan membuat kontrak kerja sama pembelian antara perusahaan dan supplier

Zahir & Batin: Rhythms of Being

Zahir & Batin: Rhythms of Being is a multi-faceted research project questioning the definition and teleology of the term Islamic art while positioning a contemporary practice of art and design within the historical discipline. The investigation emphasizes the need for a re-interpretation and expansion of the disciplinary canon of Islamic art through the methodological use of the Islamic concept of ijtihad (reform). Situated within the interstitial space of traditional, art historical and contemporary Islamic art practices, Zahir & Batin: Rhythms of Being specifically explores the concept of zahir (exoteric) and batin (esoteric) as described in the Sufi tradition. The project combines hermeneutics with an interdisciplinary studio practice, utilizing intuition and the body as vehicles for attaining esoteric knowledge. The studio-practice explores the concept of the body in Islamic tradition, phenomenology, installation art practices, critical design and timebased media

Influence of gender and academic program on financial literacy among Malaysian university students

This study examines financial literacy among Malaysian university students. It is conducted among undergraduate students at the Universiti Kebangsaan Malaysia. It also examines the effect of gender and different academic program on FL level. Various test such as the Independence T-test, ANOVA and Tukey Honest Significant Difference HSD are employed on 300 samples of primary data collected using questionnaires distributed among students from selected faculties. The questionnaire contains questions among others on financial attitude, knowledge as well personal characteristics items. The results show that the level of FL among UKM students is moderate. From the Independent T-Test, the results show a significant difference in FL scores for males and females which suggest that males are more financially literate than females. From the ANOVA and Tukey HSD the study finds that there is a statistically significant different between type of majoring and FL level with business majoring students have higher level of FL when compared to non-business majoring. From the business majoring, Financial Services and Risk Management specialization has the highest FL level. It is therefore recommended that a comprehensive and aggressive program of financial education be carried out among young people in Malaysia especially to university students from all academic program