A Verilog-A Based Fractional Frequency Synthesizer Model for Fast and Accurate Noise Assessment

This paper presents a new strategy to simulate fractional frequency synthesizer behavioral models with better performance and reduced simulation time. The models are described in Verilog-A with accurate phase noise predictions and they are based on a time jitter to power spectral density transformation of the principal noise sources in a synthesizer. The results of a fractional frequency synthesizer simulation is compared with state of the art Verilog-A descriptions showing a reduction of nearly 20 times. In addition, experimental results of a fractional frequency synthesizer are compared to the simulation results to validate the proposed model

Analogue wavelet transform with single biquad stage per scale

A new approach to obtain the wavelet transform with easily constructed analogue circuits is presented. It is shown that the impulse response of a bandpass biquad filter satisfies the conditions to be considered a mother wavelet. Using this, an integrated circuit performing the wavelet transform at 16 scales along eight octaves has been designed. The design has CMOS transistors working in the subthreshold region with a total power consumption of 650nW. On-chip measurements are reported. Zapotitlán 2010 The Institution of Engineering and Technology

Approximations of the inverse wavelet transform for analogue circuits

We propose two approximations of the inverse wavelet transform implemented with a voltage adder and two analog filters. They work together with a set of scaled band-pass analog filters that perform the wavelet transform of a continuous time signal. With this approach an integrated circuit has been fabricated. On-chip measurements demonstrate signal to reconstruction error ratios up to 25.8 dB

On-chip wavelet denoising system implemented with analogue circuits

An adaptation of the hard-thresholding denoising method for analogue circuits is presented. The proposed approach has been proved with a chip fabricated in 0.5 ?m CMOS technology. The system works for signals contaminated with white Gaussian noise in the range 100 kHz to 1.6 MHz. On-chip measurements demonstrate a noise reduction up to 7 dB. � The Institution of Engineering and Technology 2013

Universidad de las Américas-Puebla

Abstract- This paper presents a set of experiments for a digital image processing course. This set of experiments is based on MATLAB. These experiments will allow any instructor to cover experiments in most of the topics treated in a regular image processing course to be completed successfully. I