Low-voltage operation of metal-ferroelectric-insulator-semiconductor diodes incorporating a ferroelectric polyvinylidene fluoride copolymer Langmuir-Blodgett film

We report the electrical characteristics of metal-ferroelectric-insulator-semiconductor structures, where the ferroelectric layer is a Langmuir-Blodgett film of a copolymer of 70% vinylidene fluoride and 30% trifluoroethylene. The 36-nm thick copolymer films were deposited on thermally oxidized (10 nm SiO2) p-type silicon and covered with a gold gate electrode. Polarization-field hysteresis loops indicate polarization switching in the polymer film. The device capacitance shows hysteresis when cycling the applied voltage between ±3 V, exhibiting a zero-bias on/off capacitance ratio of over 3:1 and a symmetric memory window 1 V wide, with little evidence of bias that can arise from traps in the oxide. Model calculations are in good agreement with the data and show that film polarization was not saturated. The capacitance hysteresis vanishes above the ferroelectric- paraelectric transition temperature, showing that it is due to polarization hysteresis. The retention time of both the on and off states was approximately 15 min at room temperature, possibly limited by leakage or by polarization instability in the unsaturated film. These devices provide a basis for nonvolatile data storage devices with fast nondestructive readout

Full silicidation process for making CoSi2 on SiO2

A silicidation process was developed to produce high-quality CoSi2 directly on SiO2, which can be used for metal gates of metal-oxide-semiconductor field-effect transistors (MOSFETs). Normally, the formation of a CoSi2 layer on SiO2 is very difficult because of the requirement for an exact Co/Si thickness ratio. In our process, an additional Si layer was deposited after the first rapid thermal processing (RTP) at 500 degreesC and selective etching of the unreacted Co. The additional Si layer provided a Si supply for the second RTP at a higher temperature. This method allows the Co layer thickness to be varied over a fairly large range, and in addition, the microstructure of the silicide layer and the CoSi2/SiO2 interface were substantially improved. (C) 2004 American Institute of Physics

Surface characterisation and interface studies of high-k materials by XPS and TOF-SIMS

High-k dielectric LaAlO3 (LAO) films on Si(100) were studied by TOF-SIMS and XPS to look for diffusion processes during deposition and additional thermal treatment and for the formation and composition of possible interfacial layers. The measurements reveal the existence Of SiO2 at the LAO/Si interface. Thermal treatment strengthens this effect indicating a segregation of Si. However, thin LAO layers show no interfacial SiO2 but the formation of a La-Al-Si-O compound. In addition, Pt diffusion from the top coating into the LAO layers occurs. Within the LAO layer C is the most abundant contamination (10(21) at/cm(3)). Its relatively high concentration could influence electric characteristics. XPS shows that CO32- is intrinsic to the LAO layer and is due to the adsorption of CO2 of the residual gas in the deposition chamber. (c) 2005 Elsevier B.V. All rights reserved

Tuning of NiSi/Si Schottky barrier heights by sulfur segregaton during Ni silicidation and fabrication of Schottky MOSFETs

The Schottky barrier height (SBH) of NiSi on Si(100) was tuned in a controlled manner by the segregation of sulfur (S) to the silicide/silicon interface. S was implanted into silicon prior to silicidation. During subsequent Ni silicidation, the segregation of S at the NiSi/Si inter-face leads to the change of the SBH. The Sl3H of NiSi decreased gradually on n-Si(100) from 0.65 CV to 0.07 eV and increased correspondingly on p-Si(100). (C) 2005 American Institute of Physics

Dysprosium scandate thin films as an alternate amorphous gate oxide prepared by metal-organic chemical vapor deposition

Dysprosium scandate (DyScO3) thin films were deposited on Si substrates using metal-organic chemical vapor deposition. Individual source precursors of Dy and Sc were used and deposition temperatures ranged from 480 to 700 degrees C. Films were amorphous with low root mean square roughness (<= 2 A) and were stable up to 1050 degrees C annealing. Electrical characterization yielded C-V curves with negligible hysteresis (< 10 mV), high dielectric constant (similar to 22), and low leakage currents. The electrical properties of the DyScO3/SiOx/Si stacks were stable up to 800 degrees C for films on native oxide; however, this limit increased to 900 degrees C for films on special chemically grown oxide, suggesting further improvement with proper diffusion barrier. (c) 2006 American Institute of Physics

Ferroelectric field effect transistors using very thin ferroelectric polyvinylidene fluoride copolymer films as gate dielectrics

We report electrical characterization of memory elements consisting of a p-type silicon field-effect transistor incorporating a ferroelectric polymer Langmuir–Blodgett film into the gate insulator to produce bistability through polarization hysteresis. The thin gate insulator, consisting of a 10 nm thick silicon oxide layer and a 35 nm thick ferroelectric polymer film, enabled bistable operation at 4 V. Device hysteresis as a function of gate voltage was evident both in the device capacitance, which was measured between the gate and drain, and in the source-drain conductance. The ferroelectric film polarization was not saturated, even up to operating voltages of 10 V. This is likely the reason for the short state retention of less than 10 s at room temperature. The hysteresis vanished as the sample was heated toward the ferroelectric-paraelectric phase transition temperature, showing that the bistability was due to ferroelectric polarization reversal