317 research outputs found
Sur les facteurs des suites de sturm
RĂ©sumĂ©Cet article a pour objet l'Ă©tude d'une construction associant Ă toute droite de pente p/q (p et q premiers entre eux et qâ©œn) un mot de longueur n sur l'alphabet {0,1}. Nous montrons que nous obtenons par cette construction le langage constituĂ© de tous les facteurs des suites de Sturm. Nous formulons, aprĂ©s avoir obtenu une Ăšquation fonctionelle dont la solution est la sĂ©rie gĂ©nĂ©ratrice de ce langage, une conjecture reliant cette sĂ©rie gĂ©nĂ©ratrice Ă la fonction d'Euler.AbstractIn this paper, we study a construction which connects to each line with slope p/q (such that gcd(p, q) = 1 and qâ©œn) a word of length n over the alphabet {0, 1}. We show that this construction yields the language of all the factors of the sturmian sequences. We first obtain a functional equation whose solution is the generating function of this language, and then we give a conjecture relating this generating function to the Euler function
An O(n^3)-Time Algorithm for Tree Edit Distance
The {\em edit distance} between two ordered trees with vertex labels is the
minimum cost of transforming one tree into the other by a sequence of
elementary operations consisting of deleting and relabeling existing nodes, as
well as inserting new nodes. In this paper, we present a worst-case
-time algorithm for this problem, improving the previous best
-time algorithm~\cite{Klein}. Our result requires a novel
adaptive strategy for deciding how a dynamic program divides into subproblems
(which is interesting in its own right), together with a deeper understanding
of the previous algorithms for the problem. We also prove the optimality of our
algorithm among the family of \emph{decomposition strategy} algorithms--which
also includes the previous fastest algorithms--by tightening the known lower
bound of ~\cite{Touzet} to , matching our
algorithm's running time. Furthermore, we obtain matching upper and lower
bounds of when the two trees have
different sizes and~, where .Comment: 10 pages, 5 figures, 5 .tex files where TED.tex is the main on
PARISROC, a Photomultiplier Array Integrated Read Out Chip
PARISROC is a complete read out chip, in AMS SiGe 0.35 !m technology, for
photomultipliers array. It allows triggerless acquisition for next generation
neutrino experiments and it belongs to an R&D program funded by the French
national agency for research (ANR) called PMm2: ?Innovative electronics for
photodetectors array used in High Energy Physics and Astroparticles?
(ref.ANR-06-BLAN-0186). The ASIC (Application Specific Integrated Circuit)
integrates 16 independent and auto triggered channels with variable gain and
provides charge and time measurement by a Wilkinson ADC (Analog to Digital
Converter) and a 24-bit Counter. The charge measurement should be performed
from 1 up to 300 photo- electrons (p.e.) with a good linearity. The time
measurement allowed to a coarse time with a 24-bit counter at 10 MHz and a fine
time on a 100ns ramp to achieve a resolution of 1 ns. The ASIC sends out only
the relevant data through network cables to the central data storage. This
paper describes the front-end electronics ASIC called PARISROC.Comment: IEEE Nuclear Science Symposium an Medical Imaging Conference (2009
NSS/MIC
HARDROC, Readout chip of the Digital Hadronic Calorimeter of ILC
HARDROC (HAdronic Rpc Detector ReadOut Chip) [1] is the very front end chip designed for the readout of the RPC or Micromegas foreseen for the Digital HAdronic CALorimeter (DHCAL) of the future International Linear Collider. The very fine granularity of the ILC hadronic calorimeters (1cm2 pads) implies a huge number of electronics channels (4 105 /m3) which is a new feature of âimagingâ calorimetry. Moreover, for compactness, the chips must be embedded inside the detector making crucial the reduction of the power consumption to 10 ÎŒW per channel. This is achieved using power pulsing, made possible by the ILC bunch pattern (1 ms of data acquisition for 199 ms of dead time). HARDROC readout is a semi-digital readout with three thresholds which allows both good tracking and coarse energy measurement, and also integrates on chip data storage. The overall performance of HARDROC will be described with detailed measurements of all the characteristics. Hundreds of chips have indeed been produced and tested before being mounted on printed boards developed for the readout of large scale (1m2) RPC and Micromegas prototypes. These prototypes have been tested with cosmics and also in testbeam at CERN in 2008 and 2009 to evaluate the performance of different kinds of GRPCs and to validate the semi-digital electronics readout system in beam conditions
A Characterization of Bispecial Sturmian Words
A finite Sturmian word w over the alphabet {a,b} is left special (resp. right
special) if aw and bw (resp. wa and wb) are both Sturmian words. A bispecial
Sturmian word is a Sturmian word that is both left and right special. We show
as a main result that bispecial Sturmian words are exactly the maximal internal
factors of Christoffel words, that are words coding the digital approximations
of segments in the Euclidean plane. This result is an extension of the known
relation between central words and primitive Christoffel words. Our
characterization allows us to give an enumerative formula for bispecial
Sturmian words. We also investigate the minimal forbidden words for the set of
Sturmian words.Comment: Accepted to MFCS 201
SPIROC (SiPM Integrated Read-Out Chip): Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out.
Omega et Calice collaborationsInternational audienceThe SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memory content (time and charge on 2 gains). The data are then stored in a 4kbytes RAM. A very complex digital part has been integrated to manage all theses features and to transfer the data to the DAQ which is described on [2]. After an exhaustive description, the extensive measurement results of that new front-end chip will be presented
PARISROC, a photomultiplier array readout chip
PARISROC is a complete read out chip, in AMS SiGe 0.35 micron technology, for
photomultipliers array. It is a front-end electronics ASIC which allows
triggerless acquisition for the next generation of neutrino experiments. These
detectors have place in megaton size water tanks and will require very large
surface of photo-detection. An R & D program, funded by French national agency
for research and called PMm2, proposes to segment the very large surface of
photo-detection in macro pixels made of 16 photomultiplier tubes connected to
an autonomous front-end electronics. The ASIC allows triggerless acquisition
and only send out the relevant data by network to the central data storage.
This data management reduces considerably the cost of these detectors. This
paper describes the front-end electronics ASIC called PARISROC which integrates
totally independents 16 channels with a variable gain and provides charge and
time measurement with a 12-bit ADC and a 24-bits Counter.Comment: 1st international conference on Technology and Instrumentation in
Particle Physics (TIPP09), Tsukuba, Japan (2009
How to compare arc-annotated sequences: The alignment hierarchy
International audienceWe describe a new unifying framework to express comparison of arc-annotated sequences, which we call alignment of arc-annotated sequences. We first prove that this framework encompasses main existing models, which allows us to deduce complexity results for several cases from the literature. We also show that this framework gives rise to new relevant problems that have not been studied yet. We provide a thorough analysis of these novel cases by proposing two polynomial time algorithms and an NP-completeness proof. This leads to an almost exhaustive study of alignment of arc-annotated sequences
SPIROC (SiPM Integrated Read-Out Chip): Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out
The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memory content (time and charge on 2 gains). The data are then stored in a 4kbytes RAM. A very complex digital part has been integrated to manage all theses features and to transfer the data to the DAQ which is described on [2]
SPIROC (SiPM Integrated Read-Out Chip): Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out
The SPIROC chip is a dedicated very front-end electronics for an ILC prototype hadronic calorimeter with Silicon photomultiplier (or MPPC) readout. This ASIC is due to equip a 10,000-channel demonstrator in 2009. SPIROC is an evolution of FLC_SiPM used for the ILC AHCAL physics prototype [1]. SPIROC was submitted in June 2007 and will be tested in September 2007. It embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge from one photoelectron to 2000 and the time with a 100ps accurate TDC. An analogue memory array with a depth of 16 for each channel is used to store the time information and the charge measurement. A 12-bit Wilkinson ADC has been embedded to digitize the analogue memory content (time and charge on 2 gains). The data are then stored in a 4kbytes RAM. A very complex digital part has been integrated to manage all theses features and to transfer the data to the DAQ which is described on [2]. After an exhaustive description, the extensive measurement results of that new front-end chip will be presented
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