Anisotropic Vapor HF etching of silicon dioxide for Si microstructure release

Damages are created in a sacrificial layer of silicon dioxide by ion implantation to enhance the etch rate of silicon-dioxide in liquid and vapor phase hydrofluoric acid. The etch rate ratio between implanted and unimplanted silicon dioxide is more than 150 in vapor hydrofluoric acid (VHF). This feature is of interest to greatly reduce the underetch of microelectromechanical systems anchors. Based on the experimentally extracted etch rate of unimplanted and implanted silicon dioxide, the patterning of the sacrificial layer can be predicted by simulation

Low loss CMOS-compatible PECVD silicon nitride waveguides and grating couplers for blue light optogenetic applications

This paper presents silicon nitride (SixNy) photonic integrated circuits (PICs) with high performance at a wavelength of 450 nm, which, therefore, is suitable for neuronal stimulation with optogenetics. These PICs consist of straight and bent waveguides, and grating couplers that are fabricated in a complementary metal-oxide-semiconductor (CMOS)-compatible plasma enhanced chemical vapor deposition SixNy platform. Their characterization shows propagation losses of 0.96 +/- 0.4 dB/cm on average for straight waveguides that are 1-5 mu m wide and bend insertion losses as low as 0.2 dB/90. for 1 mu m wide waveguides with a radius of 100 mu m. Additionally, the grating coupler characterization shows that they can deliver about 10 mu W of light in an area of 5 x 9 mu m(2) (240 mW/mm(2)), which is captured from an uncollimated laser diode (70 mW). Besides delivering sufficient power for optogenetic applications, the gratings have dimensions that are comparable to the size of a neuron, which would allow single cell interaction. These results demonstrate that, with this SixNy platform, high-density and large-scale implantable neural devices can be fabricated and readily integrated into existing CMOS-compatible neuro-electronic platforms

Design guidelines for releasing silicon nanowire arrays by liquid and vapor phase hydrofluoric acid

Silicon nanowires of various geometries are fabricated using top-down approach starting from silicon-on-insulator substrate. Arrays of nanowires presenting widths from 25 up to 100 nm regularly spaced by 50 nm up to 1 μm are patterned and released. A comparison of various release methodologies, based on scanning electron microscopy images, namely wet release in hydrofluoric acid - 5% with rinse in water or iso-propanol followed by drying by evaporation in air or using a critical point dryer, and dry release using vapor phase hydrofluoric acid is presented. Forces acting on suspended wires during release are calculated. Increase of successful release length by increasing spacing between the wires is observed for both wet and vapor phase hydrofluoric acid release techniques. Maximum detachment length of 9 μm is achieved for 50 × 100 nm2 array of nanowires spaced by 1 μm using vapor phase hydrofluoric acid etching method

Improvement of PECVD Silicon-Germanium crystallization for CMOS compatible MEMS applications

This paper investigates the influence of the electrode spacing, chamber pressure, total gas flow, and H-2 dilution on the crystallinity, resistivity, uniformity, and stress of polycrystalline silicon-germanium (poly-SiGe) films grown by plasma-enhanced chemical vapor deposition (PECVD). Boron-doped PECVD SiGe films of 1.6 mu m thick are deposited on 400 nm chemical vapor deposition layers from SiH4, GeH4, and B2H6 precursors. The microstructure is verified by transmission electron microscopy and by X-ray diffraction. It was discovered that for constant temperature and deposition rate, the PECVD SiGe microstructure changes from completely amorphous to polycrystalline by increasing the electrode spacing and pressure due to reduced ion bombardment. A process window of an electrode spacing and pressure for the PECVD poly-SiGe deposition is thus identified based on a sheet resistance mapping method. Increasing the total gas flow dramatically improves the within-wafer crystallinity variation and further reduces the resistivity. Increasing the H-2 flow during PECVD shifts the stress from -51 to 17 MPa and further reduces the crystallinity variation over the wafer. In addition, the effect of changing the SiH4 to GeH4 ratio and the in situ boron doping by adding B2H6 is also investigated. The findings in this paper are expected to facilitate the use of poly-SiGe in the above complementary metal oxide semiconductor (CMOS) microelectromechanical system (MEMS) applications.status: publishe

Low loss CMOS-compatible PECVD silicon nitride waveguides and grating couplers for blue light optogenetic applications

© 2009-2012 IEEE. This paper presents silicon nitride (SixNy) photonic integrated circuits (PICs) with high performance at a wavelength of 450 nm, which, therefore, is suitable for neuronal stimulation with optogenetics. These PICs consist of straight and bent waveguides, and grating couplers that are fabricated in a complementary metal-oxide-semiconductor (CMOS)-compatible plasma enhanced chemical vapor deposition SixNy platform. Their characterization shows propagation losses of 0.96 $\pm$ 0.4 dB/cm on average for straight waveguides that are 1-5 $\mu$m wide and bend insertion losses as low as 0.2 dB/90 $^\circ$ for 1 $\mu$m wide waveguides with a radius of 100 $\mu$m. Additionally, the grating coupler characterization shows that they can deliver about 10 $\mu$W of light in an area of 5 $\times$ 9 $\mu$m2 (240 mW/mm2), which is captured from an uncollimated laser diode (70 mW). Besides delivering sufficient power for optogenetic applications, the gratings have dimensions that are comparable to the size of a neuron, which would allow single cell interaction. These results demonstrate that, with this SixNy platform, high-density and large-scale implantable neural devices can be fabricated and readily integrated into existing CMOS-compatible neuro-electronic platforms.status: publishe

Stacked boron doped poly-crystalline silicon-germanium layers: an excellent MEMS structural material

In this work stacked boron doped poly-crystalline Silicon-Germanium (poly-SiGe) layers, which can be applied as structural MEMS layers, were studied. A standard 1 µm base layer, deposited at 480 ºC chuck temperature, is stacked until the required thickness (e.g. 10 x for a 10 µm thick layer). This 1 µm base layer consists of a PECVD seed layer (+/− 75 nm), a CVD crystallization layer (+/− 135 nm) and a PECVD layer to achieve the required thickness with a high growth-rate. The top part of this PECVD layer can optionally be used for optimizing the stress gradient by a stress compensation layer. This approach resulted in 4 µm thick poly-SiGe MEMS structural layers with low tensile stress (50 MPa), low resistivity (2 mΩcm) and a low strain gradient (< 1*10¯⁵/µm).status: publishe