Search for VHE gamma rays from SS433/W50 with the CANGAROO-II telescope

SS433, located at the center of the supernova remnant W50, is a close proximity binary system consisting of a compact star and a normal star. Jets of material are directed outwards from the vicinity of the compact star symmetrically to the east and west. Non-thermal hard X-ray emission is detected from lobes lying on both sides. Shock accelerated electrons are expected to generate sub-TeV gamma rays through the inverse-Compton process in the lobes. Observations of the western X-ray lobe region of SS433/W50 system have been performed to detect sub-TeV gamma-rays using the 10m CANGAROO-II telescope in August and September, 2001, and July and September, 2002. The total observation times are 85.2 hours for ON source, and 80.8 hours for OFF source data. No significant excess of sub-TeV gamma rays has been found at 3 regions of the western X-ray lobe of SS433/W50 system. We have derived 99% confidence level upper limits to the fluxes of gamma rays and have set constraints on the strengths of the magnetic fields assuming the synchrotron/inverse-Compton model for the wide energy range of photon spectrum from radio to TeV. The derived lower limits are 4.3 microgauss for the center of the brightest X-ray emission region and 6.3 microgauss for the far end from SS433 in the western X-ray lobe. In addition, we suggest that the spot-like X-ray emission may provide a major contribution to the hardest X-ray spectrum in the lobe.Comment: 7 pages, 8 figures, to be published in Astroparticle Physic

Surface Passivation Of Ingap/gaas Hbt Using Silicon-nitride Film Deposited By Ecr-cvd Plasma

In this paper we have developed a passivation technique with silicon-nitride (SiNX) film that requires no surface pre-treatment, and is fully compatible to monolithic microwave integrated circuits (MMICs). The nitride depositions were carried out by ECR-CVD (electron cyclotron resonance-chemical vapor deposition) directly over InGaP/GaAs heterojunction structures, which are used for heterojunction bipolar transistors (HBTs). Optical emission spectrometry (OES) was used for plasma characterization, and low formation of H and NH molecules in the gas phase was detected at pressure of 2.5 mTorr. These molecules can degrade III-V semiconductor surfaces due to the preferential loss of As or P and hydrogen incorporation at the substrate. The substrates were cleaned with organic solvents using a Sox-let distillate. The ECR depositions were carried out at a fixed substrate temperature of 20 °C, SiH4/N2 flow ratio of 1, Ar flow of 5 sccm pressure of 2.5 mTorr and microwave (2.45 GHz) power of 250 W and RF (13.56 MHz) power of 4 W. We have applied this film for InGaP/GaAs HBT fabrication process with excellent results, where two major contribuiton is related to this passivation technique, the enhancement in the transistor dc gain β and the improvement in the signal-to-noise ratio when compared unpassivated and passivated devices. © 2008.2541960636066Li, X., Cao, Y., Hall, D.C., Fay, P., Han, B., Wibowo, A., Pan, N., (2004) IEEE Electron Devices Lett., 25, p. 773Jin, Z., Neumann, S., Prost, W., Tegude, F., (2005) Solid-State Electron., 49 (3), p. 409Jin, Z., Otten, F., Reimann, T., Neumann, S., Prost, W., Tegude, F., (2004) J. Solid-State Electron., 48 (9), p. 1637Yoshioka, R.T., de Barros Jr., L.E.M., Diniz, J.A., Swart, J.W., (1999) Proceedings of the International Microwave and Optoelectronics Conference, 1999. SBMO/IEEE MTT-S, APS and LEOS-IMOC '99, vol. 1, p. 108Zoccal, L.B., Diniz, J.A., Doi, I., Swart, J.W., Daltrini, A.M., Moshkalyov, S.A., (2006) J. Vac. Sci. Technol. B, 24, p. 1762Cheng, S.-Y., Fu, S.-I., Liu, W.-C., (2007) J. Vac. Sci. Technol. B, 25 (June 3), p. 73

The Influence Of Poly-si/sige Gate In Threshold, Sub-threshold Parameters And Low Frequency Noise In P-mosfets

DC performance and Low Frequency Noise in p-MOS transistor with poly-Si/SiGe Gate fabricated with the CMOS process entirely developed in the Center for Semiconductor Components at UNICAMP is presented. After deposition, films of poly-Si and poly SiGe were implanted by phosphorus ions. The transistor has a channel region with silicon oxide thickness of 30 nm and a poly-Si/SiGe gate region with self-aligned thick S/D region. The parameters on threshold, sub-threshold and low frequency noise (1/f) of poly-Si/SiGe p-MOS transistor are reported. The turn-on in the I-V characteristics increases and at a drain-to-source bias V DS of -0.1 V p-MOSFETs with L poly=1.57μm gate length had peak transconductance (G m) increased as well, compared with conventional p-MOS with poly-Si gate. The DC and 1/f characteristics of the p-MOS transistors are studied using several devices sizes. Devices show low 1/f and high values for G m parameters and make them promising devices for RF and microwave circuit applications. © The Electrochemical Society.231371380King, T.-J., Saraswat, K.C., Pfiester, J.R., (1991) IEEE Electron Device Letters, 12 (11), p. 584Sun, L., Han, P., Zheng, Y.D., Chen, P., Yan, F., Gu, S.L., Jiang, R.L., Zhu, S.M., (2003) Optical Materials, 23, p. 109Lein Wu, S., Lin, Y.M., Chang, S.J., Lu, S.C., Chen, P.S., Liu, C.W., (2006) IEEE Electron Device Letters, 27 (1), p. 46König, U., Glück, M., Höck, G., (1998) J. Vac. Sci. Technol. B, Microelectron. Process. Phenom, 16, p. 2609Ismail, K., (1995) IEDM Tech. Dig, p. 509Haartman, M.V., Westlinder, J., Wu, D., Malm, B.G., Hellström, P.E., Olsson, J., Östling, M., (2005) Solid-State Electronics, 49, p. 907Ghibaudo, G., Boutchacha, T., (2002) Microelectronics Reliability, 42, p. 573Haartman, M.V., Wu, D., Malm, B.G., Hellström, P.E., Zhang, S.L., Östling, M., (2004) Solid-State Electronics, 48, p. 2271Sugii, N., Nakagawa, K., Yamaguchi, S., Miyao, M., (1999) Appl.Phys. Lett, 75, p. 2848Sugii, N., Hisamoto, D., Washio, K., Yokoyama, N., Kimura, S., (2002) IEEE Trans. Electron Devices, 49 (12), p. 2237Shi, Z., Onsongo, D., Banerjee, S.K., (2004) Appl.Surf. Sci, 224, p. 248King, T.-J., Pfiester', J.R., Shott, J.D., McVittie, J.P., Saraswat, K.C., (1990) IEEE IEDM, 90, p. 253Yu, B., Ju, D.H., Lee, W.C., Kepler, N., King, T.J., Hu, C., (1998) IEEE Transactions on Electron Devices, 45 (6), p. 1253H.R.Jimenez GradosLeandro T. ManeraR.C.TeixeiraM. F.RautembergJ.DinizI. DoiP.J.TatschH.E.FigueroaJ.W.Swart, Journal of the Electrochemical Society, 14. p. 137, (2008)Teixeira, R.C., Doi, I., Diniz, J.A., Swart, J.W., Zakia, M.B.P., (2006) Brazilian Journal of Physics, 36, p. 466Jimenez, H.G., Pavanello, M.A., Swart, J.W., Doi, I., Diniz, J.A., (2001) XVI SBMicro-International Conference on Microelectronic and Packaging-Pirenopolis, GO-Brazil, p. 260Lin, Y.M., Wu, S.L., Chan, S.J., Chen, P.S., Liu, C.W., (2005) Materials Science in Semiconductor Processing, 8, p. 347Paul, D.J., Temple, M., Olsen, S.H., ONeill, A.G., Tang, Y.T., Waite, A.M., Cerrina, C., Cullis, A., (2005) Materials Science in Semiconductor Processing, 8, p. 343Reimbold, G., (1984) IEEE Transation on Electron Devices, ED-31 (9), p. 1190Chen, K.-M., Huang, G.-W., Chiu, D.Y., (2002) Applied Physics Letters, 81 (14), p. 2578Alvin, J.J., Harame, D.L., Jagannathan, B., Coolbaugh, D., Ahlgren, D., Magerlein, J., Lanzerotti, L., Nowak, E., (2005) Proceedings of the IEEE, 93 (9), p. 1539Hua, W.C., Lee, M.H., Chen, P.S., Tsai, M.J., Liu, C.W., (2005) IEEE Electron Device Letters, 26 (9), p. 667Schroder, D.K., (1990) Arizona, p. 185. , State University, John Wiley, Tempe, Arizona,

Dc Performance And Low Frequency Noise In N-mosfets Using Self-aligned Poly-si/sige Gate

The characterization of an n-MOS transistor with poly- Si/SiGe Gate fabricated with the CMOS process entirely developed in the Center for Semiconductor Components (CCS) at UNICAMP is presented. The Gate layer was grown by vertical LPCVD at 800 °C. The resultant transistor has a channel region with oxide thickness of 30 nm and self-aligned thick S/D region. The DC and Gm characteristics of poly-Si/SiGe n-MOS transistor are reported. The turn-on in the I-V characteristics increases and at a drain-tosource bias Vds of +0.1 V nMOSFETs with 3 μm gate length had peak transconductance (μS) increased as well, compared with conventional n-MOS with poly-Si gate. The Gm characteristics and low frequency noise 1/f of the n-MOS transistors are studied using devices sizes with width of 20 μm and several lengths. Promising devices for RF and microwave circuit applications, show low 1/f and high values of transconductance. © The Electrochemical Society.141137146Lein Wu, S., Lin, Y.M., Chang, S.J., Lu, S.C., Chen, P.S., Liu, C.W., Enhanced CMOS Performances Using Substrate Strained-SiGe and Mechanical Strained-Si Technology (2006) IEEE Electron Device Letters, 27 (1). , JanuaryKönig, U., Glück, M., Höck, G., Si/SiGe field-effect transistors (1998) J. Vac. Sci. Technol. B, Microelectron. Process. Phenom, 16, pp. 2609-2614Ismail, K., Si/SiGe high-speed field-effect transistors (1995) IEDM Tech. Dig, pp. 509-512Enciso, M., Aniel, F., Crozat, P., Adde, R., Zeuner, M., Fox, A., Hackbarth, T., 0.3 dB minimum noise figure at 2.5 GHz of 0.13 um Si/Si0.58 Ge0.42 n-MODFETs (2001) Electron. Lett, 37, pp. 1089-1090Vilches, A., Fobelets, K., Michelakis, K., Despotopoulos, S., Papavassiliou, C., Hackbarth, T., König, U., Monolithic micropower amplifier using SiGe n-MODFET device (2003) Electron. Lett, 39, pp. 884-886Koester, S.J., Laterally-Scaled Si/Si0.7 Ge0.3 n-MODFETs with fmax > 200 GHz and low operating bias (2005) IEEE Electron Device Lett, 26 (4), pp. 178-180. , AprVilches, A., Michelakis, K., Fobelets, K., Haigh, D., Papavassiliou, C., Hackbarth, T., König, U., Buried-Channel SiGe HMODFET device potential for micropower applications (2004) Solid State Electron, 48, pp. 1423-1431Taur, Y., Ning, T.H., Fundamentals of Modern VLSI Devices (1998) Cambridge Univ, , Press, Cambridge, U.KTeixeira, R.C., Doi, I., Diniz, J.A., Swart, J.W., Zakia, M.B.P., Morphological Study of Polycrystalline SiGe Alloy Deposited by Vertical LPCVD (2006) Brazilian Journal of Physics, 36, pp. 466-469Koester, S.J., Chu, J.O., Ouyang, Q.C., Saenger, K.L., Ott, J.A., High-performance SiGe MODFET technology (2004) Materials Research Society Meeting, , presented at the, San Francisco, CA, Apr. 12-16Jimenez, H.G., Pavanello, M.A., Swart, J.W., Doi, I., Diniz, J.A., Project and Development of an Educational CMOS Process XVI SBMicro-International Conference on Microelectronic and Packaging-Pirenopolis, GO-Brazil-set-2001Lin, Y.M., Lein Wu, S., Chang, S.J., Chen, P.S., Liu, C.W., SiGe/Si PMOSFET using graded channel technique (2005) Materials Science in Semiconductor Processing, 8, pp. 347-351Koester, S.J., Saenger, K.L., Chu, J.O., Ouyang, Q.C., Ott, J.A., Canaperi, D.F., Tornello, J.A., Jahnes, C.V., Improved DC and RF Performance in Si/SiGe n-MODFETs With Ion-Implanted Buried p-Well Doping (2005) IEEE Electron Device Letters, 26 (11). , NovemberPaul, D.J., Temple, M., Olsen, S.H., ONeill, A.G., Tang, Y.T., Waite, A.M., Cerrina, C., Cullis, A.G., Strained-Si n-MOS surfacechannel and buried Si0.7 Ge0.3 compressively-strained p-MOS fabricated in a 0.25 um heterostructure CMOS process (2005) Materials Science in Semiconductor Processing, 8, pp. 343-346G. Reimbold, Modified 1/f Trapping Noise Theory and Experiments in MOS Transistors Biased from Weak to Strong Inversiorn - Influence of Interface States, IEEE Transation on Electron Devices, ED-31, No. 9, September 1984Alvin, J.J., Harame, D.L., Jagannathan, B., Coolbaugh, D., Ahlgren, D., Magerlein, J., Lanzerotti, L., Nowak, E., Status and Direction of Communication Technologies SiGe BiCMOS and RFCMOS (2005) Proceedings of the IEEE, 93 (9). , SeptemberHua, W.C., Lee, M.H., Chen, P.S., Tsai, M.J., Liu, C.W., Threading Dislocation Induced Low Frequency Noise in Strained-Si nMOSFETs (2005) IEEE Electron Device Letters, 26 (9). , SeptemberSchroder, D.K., (1990) Semiconductor Material and Device Characterization, , Arizona State University, John Wile

Control Of Micron And Submicron Feature Dimensions In 2μm Resolution Photolithographic System For Mos And Mems Applications

The development of new devices with micron and submicron dimensions requires an accurate photolithographic process steps control. The requirements are different for isolated and periodic/high-density structures. Characterization of a lithographic patterning process are presented, and the conditions of the process are optimized to obtain repetitive pattern transfer for micron and submicron scale technology with high accuracy using the equipments conventionally employed for 2 μm technology. It has been also shown that the technology in the over-exposure regime can be used to obtain -100 nm line structures.3369374Terasawa, T., Subwavelength lithography (PSM, OPC) (2000) Design Automation Conference, 2000, Proceedings of the ASP-DAC 2000, Asia and South Pacific, 25-28, pp. 295-300. , JanCain, J.P., (2002) Characterization of Spatial Variation in Photolithography, , M.S. thesis, University of California, BerkeleyPellegrini, J.C., Trends in photolithography analysis and control (1996) Solid State Technology, pp. 87-95. , Octoberhttp://www.memsnet.org/mems/Moreau, W.M., (1987) Semiconductor Lithography Principles, Practices, and Materials, pp. 329-351. , Plenum Press New York and LondonKer, W., Poutien, D.A., Cleaning solutions based on hydrogen peroxide for use in silicon semiconductor technology (1970) RCA Corporation, RCA Review, 31 (2), p. 187(1985) AZ5214 Positive Photoresist for Semiconductors and Microeletronics, , Datasheet AZ5200, Hoechst Japan Ltd, Octobe