51 research outputs found

    Ge2Sb2Te5 layer used as solid electrolyte in conductive-bridge memory devices fabricated on flexible substrate

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    7 pagesInternational audienceThis paper shows that the well-know chalcogenide Ge2Sb2Te5 (GST) in its amorphous state may be advantageously used as solid electrolyte material to fabricate Conductive-Bridge Random Access Memory (CBRAM) devices. GST layer was sputtered on preliminary inkjet-printed silver lines acting as active electrode on either silicon or plastic substrates. Whatever the substrate, the resistance switching is unambiguously attested at a nanoscale by means of conductive-atomic force microscopy (C-AFM) using a Pt-Ir coated tip on the GST surface acting as a passive electrode. The resistance change is correlated to the appearance or disappearance of concomitant hillocks and current spots at the surface of the GST layer. This feature is attributed to the formation/dissolution of a silver-rich protrusion beneath the AFM tip during set/reset operation. Beside, this paper constitutes a step toward the elaboration of crossbar memory arrays on flexible substrates since CBRAM operations were demonstrated on W/GST/Ag crossbar memory cells obtained from an heterogeneous fabrication process combining physical deposition and inkjet-printing

    Energy-band engineering for improved charge retention in fully self-aligned double floating-gate single-electron memories

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    We present a new fully self-aligned single-electron memory with a single pair of nano floating gates, made of different materials (Si and Ge). The energy barrier that prevents stored charge leakage is induced not only by quantum effects but also by the conduction-band offset that arises between Ge and Si. The dimension and position of each floating gate are well defined and controlled. The devices exhibit a long retention time and single-electron injection at room temperature

    Resistance controllability and variability improvement in a TaOx-based resistive memory for multilevel storage application

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    In order to obtain reliable multilevel cell (MLC) characteristics, resistance controllability between the different resistance levels is required especially in resistive random access memory (RRAM), which is prone to resistance variability mainly due to its intrinsic random nature of defect generation and filament formation. In this study, we have thoroughly investigated the multilevel resistance variability in a TaOx-based nanoscale (<30 nm) RRAM operated in MLC mode. It is found that the resistance variability not only depends on the conductive filament size but also is a strong function of oxygen vacancy concentration in it. Based on the gained insights through experimental observations and simulation, it is suggested that forming thinner but denser conductive filament may greatly improve the temporal resistance variability even at low operation current despite the inherent stochastic nature of resistance switching process. (C) 2015 AIP Publishing LLC.1130sciescopu

    Resistance controllability and variability improvement in a TaO x -based resistive memory for multilevel storage application

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    International audienceIn order to obtain reliable multilevel cell (MLC) characteristics, resistance controllability between the different resistance levels is required especially in resistive random access memory (RRAM), which is prone to resistance variability mainly due to its intrinsic random nature of defect generation and filament formation. In this study, we have thoroughly investigated the multilevel resistance variability in a TaOx-based nanoscale (<30 nm) RRAM operated in MLC mode. It is found that the resistance variability not only depends on the conductive filament size but also is a strong function of oxygen vacancy concentration in it. Based on the gained insights through experimental observations and simulation, it is suggested that forming thinner but denser conductive filament may greatly improve the temporal resistance variability even at low operation current despite the inherent stochastic nature of resistance switching process

    Design challenges for prototypical and emerging memory concepts relying on resistance switching

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    International audienceIntegration of functional materials in memory archi-tectures led to emerging concepts with disruptive performances as compared to conventional charge storage technologies. Beside floating gate solutions such as EEPROM and Flash, these alternative devices involve voltage or current-controlled switching mechanisms between two distinct resistance states. The origin of the resistance change straightforwardly depends upon the nature and fundamental physical properties of functional materials integrated in the memory cell. After a general overview of non volatile memories, this paper is focused on prototypical and emerging memory cells and on their ability to withstand a downscaling of their critical dimensions. In addition , despite different maturity levels, a peculiar attention is turned toward common guidelines helpful for designing embedded or distributed resistive switching memory circuits
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