Optimized adaptive control on dual buoyancy system for application in underwater gliders

Peer Reviewe

A study on assessment results in a large scale Flipped Teaching Experience

[EN] During the last academic year, Universitat Politècnica de Valencia (UPV) developed a large scale experience in flipped teaching (FT), with 64 different courses and 3083 students (2512 unique). Teachers could decide to participate in the experience on their own, and in quite a number of courses we have groups with FT and groups without it. Assessment of the students was done using classical systems (mostly written exams). Evaluation of the experience was done through several ways: First we did a qualitative survey to teachers and students, and then we carried out an analytical study about the results of the assessments, comparing between years, between FT and classical courses and also internally in the courses with FT and classical groups. Results of this analysis show that students like the FT system and that they got statistically significant better results in the classical assessments, with at least a 5% gain. Also we have no correlation results with the perceived teacher quality and the student group size. So this study allows to verify the capabilities of FT approach in higher educational institutions.http://ocs.editorial.upv.es/index.php/HEAD/HEAD18Turró, C.; Morales, JC.; Busquets-Mataix, J. (2018). A study on assessment results in a large scale Flipped Teaching Experience. Editorial Universitat Politècnica de València. 1039-1048. https://doi.org/10.4995/HEAD18.2018.8141OCS1039104

Influence of Deposition Potential on Structure of ZnO Nanowires Synthesized in Track-Etched Membranes

Single-crystal ZnO nanowires long up to several microns were fabricated by one-step electrochemical deposition. A template-based process employing track-etched polycarbonate (TE-PC) membranes was used for this purpose. The morphology and the structure characteristics of the ZnO nanowires were analyzed by means of Scanning Electron Microscopy (SEM), Focused Ion Beam (FIB), Transmission Electron Microscopy (TEM), and Selected Area Electron Diffraction (SAED). The growth process conditions turned out to have a marked influence on the crystal nature and morphology of the nanowires. Deposition rates ranging from 0.4 nm s -1 and up to 0.6 nm s -1 were recorded for the growth of ZnO nanowires. The obtained results showed that by using carefully controlled deposition conditions single crystalline nanowires and fine-grained structures can be routinely obtained. © 2012 The Electrochemical Society.This work was supported by the European Commission through the program PEOPLE, by the project no. MRTN-CT-2006-035884.Pruna, AI.; Pullini, D.; Busquets Mataix, DJ. (2012). Influence of Deposition Potential on Structure of ZnO Nanowires Synthesized in Track-Etched Membranes. Journal of The Electrochemical Society. 159(4):92-98. doi:10.1149/2.003205jesS9298159

Architecture extensions for efficient managament of scratch-pad Memory

Nowadays, many embedded processors include in their architecture on-chip static memories, so called scratch-pad memories (SPM). Compared to cache, these memories do not require complex control logic, thus resulting in increased efficiency both in silicon area and energy consumption. Last years, many papers have proposed algorithms to allocate memory segments in SPM in order to enhance its usage. However, very few care about the SPM architecture itself, to make it more controllable, more power efficient and faster. This paper proposes architecture extensions to automatically load code into the SPM whilst it is fetched for execution to reduce the SPM updating delays, which motivates a very dynamic use of the SPM. We test our proposal in a derivation of the Simplescalar simulator, with typical embedded benchmarks. The results show improvements, on average, of 30.6% in energy saving and 7.6% in performance compared to a system with cache. © 2011 Springer-Verlag.This research was sponsored by local Government “Generalitat Valenciana” under project GV07/ 2007/122.Busquets Mataix, JV.; Catalá, C.; Martí Campoy, A. (2011). Architecture extensions for efficient managament of scratch-pad Memory. En Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation. Springer Verlag (Germany). (6951):43-52. https://doi.org/10.1007/978-3-642-24154-3_5S43526951Banakar, R., Steinke, S., Lee, B.-S., Balakrishnan, M., Marwedel, P.: Scratchpad memory: design alternative for cache on-chip memory in embedded systems. In: CODES 2002, pp. 73–78 (2002)Verma, M., Wehmeyer, L., Marwedel, P.: Cache-Aware Scratchpad Allocation Algorithm. In: DATE 2004, pp. 1264–1269 (2004)Verma, M., Marwedel, P.: Advanced memory optimization techniques for low-power embedded processors, pp. I-XII, 1–188. Springer, Heidelberg (2007)Nguyen, N., Dominguez, A., Barua, R.: Memory allocation for embedded systems with a compile-time-unknown scratch-pad size. In: CASES 2005, pp. 115–125 (2005)Egger, B., Kim, C., Jang, C., Nam, Y., Lee, J., Min, S.L.: A dynamic code placement technique for scratchpad memory using postpass optimization. In: CASES 2006, pp. 223–233 (2006)Egger, B., Lee, J., Shin, H.: Scratchpad memory management for portable systems with a memory management unit. In: EMSOFT 2006, pp. 321–330 (2006)Egger, B., Lee, J., Shin, H.: Dynamic scratchpad memory management for code in portable systems with an MMU. ACM Trans. Embedded Comput. Syst. 7(2) (2008)Cho, H., Egger, B., Lee, J., Shin, H.: Dynamic data scratchpad memory management for a memory subsystem with an MMU. In: LCTES 2007, pp. 195–206 (2007)Janapsatya, A., Parameswaran, S., Ignjatovic, A.: Hardware/software managed scratchpad memory for embedded system. In: ICCAD 2004, pp. 370–377 (2004)Balakrishnan, M., Marwedel, P., Wehmeyer, L., Grunwald, N., Banakar, R., Steinke, S.: Reducing Energy Consumption by Dynamic Copying of Instructions onto Onchip Memory. In: ISSS 2002, pp. 213–218 (2002)Poletti, F., Marchal, P., Atienza, D., Benini, L., Catthoor, F., Mendias, J.M.: An integrated hardware/software approach for run-time scratchpad management. In: DAC 2004, pp. 238–243 (2004)Li, L., Gao, L., Xue, J.: Memory Coloring: A Compiler Approach for Scratchpad Memory Management. In: IEEE PACT 2005, pp. 329–338 (2005)Lee, L.H., Moyer, B., Arends, J.: Instruction fetch energy reduction using loop caches for embedded applications with small tight loops. In: ISLPED 1999, pp. 267–269 (1999)Victorio, J.A., Torres Moren, E.F., Yúfera, V.V.: Vatios: Simulador de Procesador con Estimación de Potencia. XVIII Jornadas de Paralelismo, Zaragoza (2007)Burger, D., Austin, T.M.: The SimpleScalar Tool Set Version 2.0. Technical Report 1342, Computer Sciences Department. University of Wisconsin–Madison (May 1997)Brooks, D., Tiwari, V., Martonosi, M.: Wattch: a framework for architectural-level power analysis and optimizations. In: ISCA 2000, pp. 83–94 (2000)Tarjan, D., Thoziyoor, S., Jouppi, N.: CACTI 4.0, P. HPL-2006- 86 20060606The Mälardalen WCET research group. The Mälardalen WCET benchmarks homepage, http://www.mrtc.mdh.se/projects/wcet/benchmarks.htmlCho, D., Pasricha, S., Issenin, I., Dutt, N.D., Ahn, M., Paek, Y.: Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications. IEEE Trans. on CAD of Integrated Circuits and Systems (TCAD) 28(4), 554–567 (2009

CFD analysis and hydrodynamic improvement on hybrid buoyancy driven underwater glider for extended range capabilities

Peer Reviewe

High-Efficiency Electrodeposition of Large Scale ZnO Nanorod Arrays for Thin Transparent Electrodes

In the present work an effective technique to synthesize large-scale c-axis oriented ZnO nanorod (NR) arrays is presented. The manuscript reports a single-step cathodic electrodeposition, either in aqueous and organic electrolytes, to fill up ultra-thin anodic nanoporous alumina templates. Prior to growing, self-ordered hexagonal array of cylindrical nanopores have been fabricated by anodizing Al thin films previously deposited onto ITOglass substrates. The diameter and the aspect ratio of the vertically aligned nanopores are about 60 nm and 8:1, respectively. The results of this work demonstrate that using dimethyl sulfoxide (DMSO) as an electrolyte leads to a growth more homogeneous in shape and crystallinity, and with 60 deposition efficiency - the highest by now in literature. This fact is most probably due to a better infiltration of the alumina nanopores by this electrolyte. SEM and XRD analysis were employed for the study of morphology and crystalline structure of the obtained ZnO NR. These measurements showed furthermore that ZnO nanorod arrays are uniformly embedded into the hexagonally ordered nanopores of the anodic alumina membrane. DMSO proved to be an optimal electrolyte to obtain single-crystalline ZnO NR arrays, highly transparent in visible light range (80 transmittance). © 2011 The Electrochemical Society.The authors thank for the financial support by the European Commission, DG Research through the program PEOPLE, by the project no. MRTN-CT-2006-035884.Pullini, D.; Pruna, AI.; Zanin, S.; Busquets Mataix, DJ. (2012). High-Efficiency Electrodeposition of Large Scale ZnO Nanorod Arrays for Thin Transparent Electrodes. Journal of The Electrochemical Society. 159(2):45-51. doi:10.1149/2.093202jesS4551159

Microstructural change of the HAZ in an MIG welded bond on an AA7020 aluminium alloy: stress corrosion crack growth rate in dissimilar metal welds

[EN] Many researchers have undertaken studies into the mechanical behaviour of the welded bond,1,2 others have devoted their attentions to metallurgical phenomena, whether concerning phenomena inherent to the area immediately surrounding the weld interface or concerning models or simulations of the welded structure;3,4 in addition, there are those who have made comparisons between different welding methods2 or who have dedicated their time to post-welding treatments.5 However, very few researchers have devoted their attentions to studying microstructural change throughout the HAZ on welded test pieces.Bloem, C.; Salvador Moya, MD.; Amigó, V.; Busquets Mataix, DJ. (2004). Microstructural change of the HAZ in an MIG welded bond on an AA7020 aluminium alloy: stress corrosion crack growth rate in dissimilar metal welds. Welding International. 18(7):538-542. doi:10.1533/wint.2004.3287S53854218