dReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter

Current datacenters are based on server machines, whose mainboard and hardware components form the baseline, monolithic building block that the rest of the system software, middleware and application stack are built upon. This leads to the following limitations: (a) resource proportionality of a multi-tray system is bounded by the basic building block (mainboard), (b) resource allocation to processes or virtual machines (VMs) is bounded by the available resources within the boundary of the mainboard, leading to spare resource fragmentation and inefficiencies, and (c) upgrades must be applied to each and every server even when only a specific component needs to be upgraded. The dRedBox project (Disaggregated Recursive Datacentre-in-a-Box) addresses the above limitations, and proposes the next generation, low-power, across form-factor datacenters, departing from the paradigm of the mainboard-as-a-unit and enabling the creation of function-block-as-a-unit. Hardware-level disaggregation and software-defined wiring of resources is supported by a full-fledged Type-1 hypervisor that can execute commodity virtual machines, which communicate over a low-latency and high-throughput software-defined optical network. To evaluate its novel approach, dRedBox will demonstrate application execution in the domains of network functions virtualization, infrastructure analytics, and real-time video surveillance.This work has been supported in part by EU H2020 ICTproject dRedBox, contract #687632.Peer ReviewedPostprint (author's final draft

Some Experiments About Wave Pipelining on FPGA’s

Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and buffers with data-independent delays and the knowledge of the interconnection delays. These two features are present in several SRAM-based field programmable gate arrays (FPGA’s): look-up tables (LUT’s) allow the designer to mask the delay of different gates and combinational functions, and the timing characteristics of each wire segment are a priori known. This work describes a set of experiments about wave pipelining on FPGA’s. The results show that a 13-LUT logic depth circuit mapped on an XC4005PC84-6 runs as high as 85 MHz (single phase clocking) or 80 MHz (intentionally skewed clocking), exhibiting a latency of 95 ns. This high throughput/latency ratio is unattainable using classic pipelining

Some Notes on Power Management on Fpga-Based Systems

Although the energy required to perform a logic operation has continuously dropped at least by ten orders of magnitude since early vacuum-tube electronics [1], the increasing clock frequency and gate density of the current integrated circuits has appended power consumption to traditional design trade-offs. This paper explore the usefullness of some low-power design methods based on architectural and implementation modifications, for FPGA-based electronic systems. The contribution of spurious transitions to the overall consumption is evidenced and main strategies for its reduction are analized. The effectiveness of pipelining and partitioning inprovements as low-power design methodologies are quantified by case-studies based on array multipliers

Tolerance of high mountain quinoa to simulated extraplanetary conditions: Changes in surface mineral concentration, seed viability and early growth

We studied the tolerance of one species of quinoa achenes from ecotype RQ252 to simulated extraplanetary conditions in a vacuum chamber (high low-pressure 10–2 to 10-7 Torr, UV laser simulated plasma radiation, and cryogenic temperature). The selection of this ecotype of quinoa achenes was a condition to previous studies, where RQ252 shows evidence of high efficacy in grow adaptation in the South America Puna between 3800–4500 m asl subjected to low oxygen and increased UV radiation exposition. After extraplanetary experiment exposure, we evaluated quinoa tolerance to experimental conditions through germination and early growth responses under a controlled laboratory standard atmosphere. Rate and final germination subjected to high low-pressure treatments during 4 h, 8 h, and 16 h were not different to control. Laser plasma application accelerated the germination rates. Final germination always reaches values up to 90%. SEM-EDS analysis showed structural changes on the pericarp surface, especially in high low-pressure and high low pressure + plasma treatments. EDS revealed that the quinoa pericarp subjected to different treatments showed changes in mineral content. Potassium ions decreased under high low-pressure and high low pressure + laser plasma irradiation (between 32 and 42%) but increased in a prolonged vacuum (35%) and more when plasma was added (96%). Early growth was affected by the different treatments, being the radicle length the most affected parameter. Our results suggest that quinoa achene ecotype RQ252 viability has excellent tolerance to extraplanetary conditions.Fil: Ponessa, G. I.. Fundación Miguel Lillo; ArgentinaFil: Such, P.. University of York; Reino UnidoFil: González, J. A.. Fundación Miguel Lillo; ArgentinaFil: Mercado, Maria Ines. Fundación Miguel Lillo; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Tucumán; ArgentinaFil: Buedo, S. E.. Fundación Miguel Lillo; ArgentinaFil: Gonzalez, Daniela Alejandra. Universidad Nacional de Tucumán. Instituto de Bioprospección y Fisiología Vegetal. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet Noa Sur. Instituto de Bioprospección y Fisiología Vegetal; ArgentinaFil: Lalla, E.. University of York; Reino UnidoFil: Freemantle, J.. University of York; Reino UnidoFil: Daly, M. G.. University of York; Reino Unid

Rack-scale disaggregated cloud data centers: The dReDBox project vision

For quite some time now, computing systems servers, whether low-power or high-end ones designs are created around a common design principle: the main-board and its hardware components form a baseline, monolithic building block that the rest of the hardware/software stack design builds upon. This proportionality of compute/memory/network/storage resources is fixed during design time and remains static throughout machine lifetime, with known ramifications in terms of low system resource utilization, costly upgrade cycles and degraded energy proportionality. dReDBox takes on the challenge of revolutionizing the low-power computing market by breaking server boundaries through materialization of the concept of disaggregation. Besides proposing a highly modular software-defined architecture for the next generation datacentre, dRedBox will specify, design and prototype a novel hardware architecture where SoC-based microservers, memory modules and accelerators, will be placed in separated modular server trays interconnected via a high-speed, low-latency opto-electronic system fabric, and be allocated in arbitrary sets, as driven by fit-for-purpose resource/power management software. These blocks will employ state-of-the-art low-power components and be amenable to deployment in various integration form factors and target scenarios. dRedBox aims to deliver a full-fledged, vertically integrated datacentre-in-a-box prototype to showcase the superiority of disaggregation in terms of scalability, efficiency, reliability, performance and energy reduction which will be demonstrated in three pilot use-cases. © 2016 EDAA

DReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter

Current datacenters are based on server machines, whose mainboard and hardware components form the baseline, monolithic building block that the rest of the system software, middleware and application stack are built upon. This leads to the following limitations: (a) resource proportionality of a multi-tray system is bounded by the basic building block (mainboard), (b) resource allocation to processes or virtual machines (VMs) is bounded by the available resources within the boundary of the mainboard, leading to spare resource fragmentation and inefficiencies, and (c) upgrades must be applied to each and every server even when only a specific component needs to be upgraded. The dRedBox project (Disaggregated Recursive Datacentre-in-a-Box) addresses the above limitations, and proposes the next generation, low-power, across form-factor datacenters, departing from the paradigm of the mainboard-as-a-unit and enabling the creation of function-block-as-a-unit. Hardware-level disaggregation and software-defined wiring of resources is supported by a full-fledged Type-1 hypervisor that can execute commodity virtual machines, which communicate over a low-latency and high-throughput software-defined optical network. To evaluate its novel approach, dRedBox will demonstrate application execution in the domains of network functions virtualization, infrastructure analytics, and real-time video surveillance. © 2018 EDAA

dReDBox: Materializing a full-stack rack-scale system prototype of a next-generation disaggregated datacenter

Current datacenters are based on server machines, whose mainboard and hardware components form the baseline, monolithic building block that the rest of the system software, middleware and application stack are built upon. This leads to the following limitations: (a) resource proportionality of a multi-tray system is bounded by the basic building block (mainboard), (b) resource allocation to processes or virtual machines (VMs) is bounded by the available resources within the boundary of the mainboard, leading to spare resource fragmentation and inefficiencies, and (c) upgrades must be applied to each and every server even when only a specific component needs to be upgraded. The dRedBox project (Disaggregated Recursive Datacentre-in-a-Box) addresses the above limitations, and proposes the next generation, low-power, across form-factor datacenters, departing from the paradigm of the mainboard-as-a-unit and enabling the creation of function-block-as-a-unit. Hardware-level disaggregation and software-defined wiring of resources is supported by a full-fledged Type-1 hypervisor that can execute commodity virtual machines, which communicate over a low-latency and high-throughput software-defined optical network. To evaluate its novel approach, dRedBox will demonstrate application execution in the domains of network functions virtualization, infrastructure analytics, and real-time video surveillance.This work has been supported in part by EU H2020 ICTproject dRedBox, contract #687632.Peer Reviewe