SAR processing on the MPP

The processing of synthetic aperture radar (SAR) signals using the massively parallel processor (MPP) is discussed. The fast Fourier transform convolution procedures employed in the algorithms are described. The MPP architecture comprises an array unit (ARU) which processes arrays of data; an array control unit which controls the operation of the ARU and performs scalar arithmetic; a program and data management unit which controls the flow of data; and a unique staging memory (SM) which buffers and permutes data. The ARU contains a 128 by 128 array of bit-serial processing elements (PE). Two-by-four surarrays of PE's are packaged in a custom VLSI HCMOS chip. The staging memory is a large multidimensional-access memory which buffers and permutes data flowing with the system. Efficient SAR processing is achieved via ARU communication paths and SM data manipulation. Real time processing capability can be realized via a multiple ARU, multiple SM configuration

The Incremental Garbage Collection of Processes

Key Words and Phrases: garbage collection, multiprocessing systems, processor scheduling. "lazy evaluation, "eager" evaluation. CR Categories: 3.60, 3.80, 4.13, 4.22, 4.32. This report describes research done at the Artificial Intelligence Laboratory of the Massachusetts Institute of Technology. Support for the laboratory's artificial intelligence research is provided in part by the Advanced Research Projects Agency of the Department of Defense under Office of Naval Research contract N00014-75-C-0522. This paper was presented at the AI*PL Conference at Rochester, N.Y. in August, 1977.This paper investigates some problems associated with an argument evaluation order that we call "future" order, which is different from both call-by-name and call-by-value. In call-by-future, each formal parameter of a function is bound to a separate process (called a "future") dedicated to the evaluation of the corresponding argument. This mechanism allows the fully parallel evaluation of arguments to a function, and has been shown to augment the expressive power of a language. We discuss an approach to a problem that arises in this context: futures which were thought to be relevant when they were created become irrelevant through being ignored in the body of the expression where they were bound. The problem of irrelevant processes also appears in multiprocessing problem-solving systems which start several processors working on the same problem but with different methods, and return with the solution which finishes first. This parallel method strategy has the drawback that the processes which are investigating the losing methods must be identified, stopped, and re-assigned to more useful tasks. The solution we propose is that of garbage collection. We propose that the goal structure of the solution plan be explicitly represented in memory as part of the graph memory (like Lisp's heap) so that a garbage collection algorithm can discover which processes are performing useful work, and which can be recycled for a new task. An incremental algorithm for the unified garbage collection of storage and processes is described.MIT Artificial Intelligence Laboratory Department of Defense Advanced Research Projects Agenc

Sequence of bronchoalveolar lavage and histopathologic findings in rat lungs early in inhalation asbestos exposure

To assess the early cellular inflammatory response of the lungs, 7 rats per group were exposed nose-only to 13 mg/m3 of chrysotile asbestos, 7 h/day for 2, 4, or 6 wk. Lung histopathology and bronchoalveolar lavage (BAL) were analyzed. In exposed animals, dose-related bronchiolitis and fibrosis were found that were not seen in control rats (p less than 0.001). In exposed rats, total BAL cells were increased six-to sevenfold over matched controls, and more cells were retrieved with longer exposure (p less than 0.001). In the BAL, counts of macrophages, lymphocytes, and polymorphonuclear cells (PMNs) were each elevated in the exposed rats (each p less than 0.001). PMNs seen histologically and in the BAL may be related to the time period examined. PMNs and lymphocytes observed throughout this 6-wk study support the idea that these cells may have an important role in the early events of asbestos lung injury

Sorting networks and their applications

To achieve high throughput rates today's computers perform several operations simultaneously. Not only are I/O operations performed concurrently with computing, but also, in multiprocessors, several computin

The universality of various types of SIMD machine interconnection networks

SIMD machine architects must choose an interconnection network to provide interprocessor communication. The universality of a network is its ability to simulate arbitrary interconnections of the processing elements. We examine the universality of five particular networks which cover the types used in the llliac IV, STARAN, Omen, SlMDA, and RAP machines. They also cover the types discussed by Feng, Lang, Lawrie, Orcutt, Siegel, and Stone. We give O((log2N)2 ) algorithms, where N is the number of processing elements, for the Perfect Shuffle, PM21, WPM21, and Cube networks to simulate arbitrary interconnections (Orcutt has given an O(Nl/2log2N) algorithm for the llliac network). We analyze Batcher\u27s bitonic sorting method and show how each network can implement it on an SIMD machine. We discuss how sorting destination tags is equivalent to simulating interconnections.</p

The givens-batcher reduction algorithm and matrix triangularisation

A Givens sequence is any sequence of Givens rotations in which zeroes once created are preserved [3]. Givens rotations are applied to a variety of matrix problems, as a means of producing stable non-pivoting triangularisation, and have become popular recently because they are amenable to parallel and VLSI computing. A Batcher sequence is a sequence of comparisons which can be used to sort an arbitrary list of elements in a way that avoids propagation of exchanges by merging pairs of sorted subsequences. In the former case parallelism is admitted because disjoint rotations can be performed in parallel, in the latter the merging can be achieved by nonoverlapping comparisons. Batcher's method produces a highly parallel sorting network suited to VLSI implementation. In this paper we combine the two ideas to produce a Givens-Batcher sequence which reduces a matrix to triangular form using a number of passes. Batchers sorting network can then be employed as a VLSI array with pipelining and high throughput