108 research outputs found
Technology Scaling Impact on Embedded ADC Design for Telecom Receivers
This paper is concerned with the impact of technology scaling on the choice of A/D converters in telecom receivers. It is shown that the trend of diminishing feature size, together with better matching of passive components, allows the use of A/D topologies traditionally confined to low-frequency, medium-resolution applications. The design of a 10 bit 20 MS/s ADC using the successive approximation algorithm is presented in order to validate the presented concepts. By using a deep-submicron technology, the speed of the chosen architecture is pushed to meet the desired output rate
Ultra-thin oxide breakdown for OTP development in power technologies
AbstractOTP (One Time Programmable) memory in power technology enables electrical performance optimization together with area occupation reduction. In this paper, the aspects relative to the oxide breakdown (which is the key mechanism for memory programmability) are studied and applied to the development of an antifuse OTP cell in a 350 nm-CMOS power technology. The physical analysis of the degradation phases of an oxide layer is presented together with the physical models, exploited to foresee the device time-to-breakdown depending on applied voltage, oxide thickness etc. The achieved results are used in the development and reliable implementation of OTP cells in the target 350 nm-CMOS node
A fast and low noise charge sensitive preamplifier in 90 nm CMOS technology
A fast charge sensitive preamplifier was designed and built in a 90 nm CMOS technology. The work is part of the R&D effort towards the read out of pixel or small strip sensors in next generation HEP experiments. The preamplifier features outstanding noise performance given its wide bandwidth, with a ENC (equivalent noise charge) of about 350 electrons RMS with a detector of 1 pF capacitance. With proper filtering, the ENC drops to less than 200 electrons RMS. Power consumption is 5 mW for one channel, and the closed loop bandwith is about 180 MHz, for a risetime down to 2 ns in the fastest operation mode. Thanks to some freedom left to the user in setting the open loop gain, detectors with larger source capacitance can be read out without significant loss in bandwidth, being the rise time still 5.5 ns for a 5.6 pF detector. The output can drive a 50 Ω terminated transmission line. © 2012 2012 IOP Publishing Ltd and SISSA
Performance of the new amplifier-shaper-discriminator chip for the ATLAS MDT chambers at the HL-LHC
The Phase-II Upgrade of the ATLAS Muon Detector requires new electronics for
the readout of the MDT drift tubes. The first processing stage, the
Amplifier-Shaper-Discriminator (ASD), determines the performance of the readout
for crucial parameters like time resolution, gain uniformity, efficiency and
noise rejection. An 8-channel ASD chip, using the IBM 130 nm CMOS 8RF-DM
technology, has been designed, produced and tested. The area of the chip is 2.2
x 2.9 square mm size. We present results of detailed measurements as well as a
comparision with simulation results of the chip behaviour at three different
levels of detail
GigaRad total ionizing dose and post-irradiation effects on 28 nm bulk MOSFETs
The DC performance of both n- and pMOSFETs fabricated in a commercial-grade 28 nm bulk CMOS process has been studied up to 1 Grad of total ionizing dose and at post-irradiation annealing. The aim is to assess the potential use of such an advanced CMOS technology in the forthcoming upgrade of the Large Hadron Collider at CERN. The total ionizing dose effects show limited influence in the drive current of all the tested nMOSFETs. Nonetheless, the leakage current increases significantly, affecting the normal device operation of the nMOSFETs. These phenomena can be linked to the charge trapping in the oxides and at the Si/oxide interfaces, related to both the gate oxide and the shallow trench isolation oxide. In addition, it has been observed that the radiation-induced effects are partly recovered by the long-term post-irradiation annealing. To quantify the total ionizing dose effects on DC characteristics, the threshold voltage, subthreshold swing, and drain induced barrier lowering have also been extracted for nMOSFETs
AACD Workshop Brings 150 to Italy: Three Days on Analog Circuit Design [Conference Reports]
6th Annual "Topics on Microelectronics" Seminar Held by SSCS-Italy: Programs in January and May at the University of Pavia [Chapters]
Low-voltage fully-differential switched-opamp bandpass ΣΔ modulator
The paper deals with the design of a low-voltage bandpass ΣΔ modulator implemented with the switched-capacitor technique. To use standard technology (no low-threshold devices) and without an on-chip voltage multiplier, the switched-opamp technique has been adopted. The basic building blocks for the construction of a ΣΔ modulator (SC integrator, quantiser, and feedback DAC) are proposed in a fully differential version. In addition, they have been improved with respect to those previously reported to give a larger output swing at a higher sampling frequency and without any voltage reference. The validity of the proposed circuits is demonstrated by the realisation of a second-order bandpass ΣΔ modulator operating with a single 1 V supply within a standard 0.5 μm CMOS technology (VTHn=0.65 V, VTHp=0.7 V). The modulator operates at a sampling frequency of 1.8 MHz with a full-scale input range of 2 Vpk-pk and achieves a 45 dB dynamic range in a 20 kHz bandwidt
The Evolution of Integrated Interfaces for MEMS Microphones
Over the last decade, MEMS microphones have become the leading solution for implementing the audio module in most portable devices. One of the main drivers for the success of the MEMS microphone has been the continuous improvement of the corresponding integrated interface circuit performance in terms of both dynamic range and power consumption, which enabled the introduction in mobile devices of additional functionalities, such as Hi-Fi audio recording or voice commands. As a result, MEMS microphone interface circuits evolved from just simple amplification stages to complex mixed-signal circuits, including A/D converters, with ever improving performance. This paper provides an overview of such evolution based on actual design examples, focusing, finally, on the latest cutting-edge solutions
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