Dielectric material options for integrated capacitors

Future MIM capacitor generations will require significantly increased specific capacitances by utilization of high-k dielectric materials. In order to achieve high capacitance per chip area, these dielectrics have to be deposited in three-dimensional capacitor structures by ALD or AVD (atomic vapor deposition) process techniques. In this study eight dielectric materials, which can be deposited by these techniques and exhibit the potential to reach k-values of over 50 were identified, prepared and characterized as single films and stacked film systems. To primarily focus on a material comparison, preliminary processes were used for film deposition on planar test devices. Measuring leakage current density versus the dielectric constant k shows that at low voltages (=1 V) dielectrics with k-values up to 100 satisfy the typical leakage current density specification o

SUMCASTEC_190426_NA_PLUMEE19_Conference paper_.pdf_Limoges_M. Babay_Public_NA

Paper entitled " LAB-ON-A-CHIP FOR CELLULAR ANALYSIS BY DIELECTRIC SPECTROSCOPY BASED ON INJECTION LOCKED OSCILLATORS" for the PLUMEE 2019 conference: the French speaking Multidisciplinary conference on Material, Environment and Electronic, April 10-12th, Limoges, France

Mid-infrared optical characterization of thin SiNx membranes

The investigation of the optical constants (e.g., the refractive index n and the extinction coefficient κ) has been performed in the mid-infrared spectrum for various silicon nitride (SiNx) configurations. By exploiting the transfer matrix method formulation, photometric measurements of transmission and reflection have been used for iteratively calculating the optical parameters of interest. To ensure the reliability of the n and κ, the same material from which such parameters were extracted was deposited for three different thicknesses, e.g., 600, 200, and 100 nm. While the former is optically characterized, the remaining two are used for validation purposes. For each experimental/calculated comparison, the average (made over the whole considered spectrum interval) of the relative error never exceeds 1.5%, which ensures the correctness of the given n and κ. For the sake of completeness, a detailed analysis of the intrinsic limitations arising from the very nature of the method will also be conducted

Thermo-mechanical modeling and experimental validation of an uncooled microbolometer

This paper presents mechanical and thermal modeling of a microbolometer using finite element modeling in ANSYS. The considered design of microbolometer is modeled, fabricated and measured. The deformations on the arm structure of the microbolometer are measured and compared with the developed model. Additionally, the measurements for mechanical deformations over 8-inch wafer are used to identify the effect of the process variations on the final device. The measured deformation distribution is correlated with the varied thickness of the bottom Si3N4 layer of the arm structure. Finally, the ANSYS models are utilized in order to extract thermal characterization properties of the microbolometer design, namely thermal conductance and the time constant

Development and Mechanical Modeling of Si1-xGex/Si MQW Based Uncooled Microbolometers in a 130 nm BiCMOS

This paper presents the development of process integration and mechanical modeling of a Si1-xGex/Si MQW based uncooled micro-bolometer. The recent progress on layer transfer based integration scheme of Si1-xGex/Si based micro-bolometer into a 130 nm BiCMOS process is presented. The two important parts of the process integration, namely the layer-transfer and stress compensation of the arms are studied. The initial successful results on layer transfer and the FEM modeling for the stress compensation of the thin and narrow arms of the bolometer is presented. Finally, the developed FEM model is compared with the fabricated cantilevers. The results show that the developed FEM model has a very good matching with the experimental results; thus very convenient to use for the FEM modeling of the full bolometer structure

Discrimination of Glioblastoma Cancer Stem Cells by measuring their UHF-Dielectrophoresis Crossover Frequency

International audienceThis paper introduces firsts results of characterization of glioblastoma cell lines; measuring their crossover frequencies by dielectrophoresis (DEP) technics in the UHF frequency range (above 50 MHz). LN18 line cells were cultured following different conditions, in order to achieve an enrichment of cancer stem cells (CSCs). The DEP electrokinetic method is used to discriminate the CSCs from the differentiated cells. In this study, microfluidic lab-on-chip systems implemented on Bipolar-Complementary Oxide Semiconductor (BiCMOS) technology is used allowing single cell handling and analysis. Based on measurements of their own intracellular specificities, the enriched CSCs population, cultured in dedicated defined medium, have shown clear differences of DEP crossover frequency signatures compared to differentiated cells cultured in normal medium. That demonstrates the concept and validates the technique efficiency for CSC discrimination in glioblastoma pathology

Pixel resistance optimization of a Si0.5Ge0.5/Si MQWs thermistor based on in-situ B doping for microbolometer applications

The state-of-the-art microbolometers are mainly based on polycrystalline or amorphous materials, typically Vanadium oxide (VOx) or amorphous-Silicon (a-Si), which only have modest temperature sensitivities and noise characteristics. The properties of single crystalline SiGe/Si multi quantum wells (MQWs) have been proposed as a promising material1. Particularly, SiGe/Si MQWs structure with high Ge concentration is expected to provide very high temperature coefficient of resistance (TCR) values between 6 to 8% 2. Although SiGe/Si MQWs structure as a thermistor material is extremely promising, difficulty of defect free deposition and high sheet resistance of high Ge concentrated SiGe layers are the two main bottlenecks of this approach. In this work, a very high TCR of -5.5 %/K is achieved for SiGe/Si MQWs including 50% Ge with an acceptable noise value of 2.7 × 10-13 V2/Hz at 10 Hz. The initial pixel resistance of 3 period of SiGe/Si MQWs with 50% Ge concentration is measured as 21 MΩ, which might not be compatible with the ROIC design. By the optimization of insitu Boron (B) doping level in SiGe layers of the MQW stack, 210 kΩ for 25 x 25 μm2 pixel size is achieved. The optimized B doping density of ∼1 × 1018 cm-3 in SiGe wells did not cause any significant change in the TCR value whereas the 1/f noise performance is even enhanced due to the in-situ doping process and measured as 2.9 × 10-14 V2/Hz at 10 Hz

Oxide surface roughness optimization of BiCMOS beol wafers for 200 mm wafer level microfluidic packaging based on fusion bonding

200 mm wafer level microfluidic packaging is developed by low temperature oxide-oxide fusion bonding. The requirement for high quality fusion bonding is to have less than 1 nm microroughness on the wafer surfaces. An optimization process of the oxide deposition and planarization is done on the wafer surfaces. It is achieved to lower the microroughness from 2.08 nm to 0.4 nm without backside processes on the BiCMOS wafer and to 0.615 nm with backside processes on the BiCMOS processes after optimization

Si1-xGex/Si MQW based uncooled microbolometer development and integration into 130 nm BiCMOS technology

In this paper, the recent progress on Sii-xGeVSi based high performance detector structures is presented. The process optimization of the detector by means of high TCR, low 1/f noise and appropriate resistance is summarized. The method of integrating the developed Sii-xGex/Si multi quantum well (MQW) detector structures into a 130 nm BiCMOS process is provided. The optimization studies required for the full integration of the suspended uncooled microbolometer device are presented

Dielectric material options for integrated capacitors

Future MIM capacitor generations will require significantly increased specific capacitances by utilization of high-k dielectric materials. In order to achieve high capacitance per chip area, these dielectrics have to be deposited in three-dimensional capacitor structures by ALD or AVD (atomic vapor deposition) process techniques. In this study eight dielectric materials, which can be deposited by these techniques and exhibit the potential to reach k-values of over 50 were identified, prepared and characterized as single films and stacked film systems. To primarily focus on a material comparison, preliminary processes were used for film deposition on planar test devices. Measuring leakage current density versus the dielectric constant k shows that at low voltages (=1 V) dielectrics with k-values up to 100 satisfy the typical leakage current density specification o