12 research outputs found

    Modeling of Current-Voltage Characteristics of the Photoactivated Device Based on SOI Technology

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    An analytical model of the silicon on insulator photoactivated modulator (SOI-PAM) device is presented in order to describe the concept of this novel device in which the information is electronic while the modulation command is optical. The model, relying on the classic Shockley’s analysis, is simple and useful for analyzing and synthesizing the voltage-current relations of the device at low drain voltage. Analytical expressions were derived for the output current as function of the input drain and gate voltages with a parameterization of the physical values such as the doping concentrations, channel and oxide thicknesses, and the optical control energy. A prototype SOI-PAM device having an area of 4 μm × 3 μm with known parameters is used to experimentally validate and support the model. Finally, the model allows the understanding of the physical mechanisms inside the device for both dark and under illumination conditions, and it will be used to optimize and to find the performance limits of the device

    Small Signals’ Study of Thermal Induced Current in Nanoscale SOI Sensor

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    A new nanoscale SOI dual-mode modulator is investigated as a function of optical and thermal activation modes. In order to accurately characterize the device specifications towards its future integration in microelectronics circuitry, current time variations are studied and compared for “large signal” constant temperature changes, as well as for “small signal” fluctuating temperature sources. An equivalent circuit model is presented to define the parameters which are assessed by numerical simulation. Assuring that the thermal response is fast enough, the device can be operated as a modulator via thermal stimulation or, on the other hand, can be used as thermal sensor/imager. We present here the design, simulation, and model of the next generation which seems capable of speeding up the processing capabilities. This novel device can serve as a building block towards the development of optical/thermal data processing while breaking through the way to all optic processors based on silicon chips that are fabricated via typical microelectronics fabrication process

    Zigzag-shaped nickel nanowires via organometallic template-free route

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    In this manuscript, the formation of nickel nanowires (average size: several tens to hundreds of μm long and 1.0-1.5 μm wide) at low temperature is found to be driven by dewetting of liquid organometallic precursors during spin coating process and by self-assembly of Ni clusters. Elaboration of metallic thin films by low temperature deposition technique makes the preparation process compatible with most of the substrates. The use of iron and cobalt precursor shows that the process could be extended to other metallic systems. In this work, AFM and SEM are used to follow the assembly of Ni clusters into straight or zigzag lines. The formation of zigzag structure is specific to the Ni precursor at appropriate preparation parameters. This template free process allows a control of anisotropic structures with homogeneous sizes and angles on standard Si/SiO2 surface

    Anomalous DIBL Effect in Fully Depleted SOI MOSFETs Using Nanoscale Gate-Recessed Channel Process

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    Nanoscale Gate-Recessed Channel (GRC) Fully Depleted- (FD-) SOI MOSFET device with a silicon channel thickness (tSi) as low as 2.2 nm was first tested at room temperature for functionality check and then tested at low temperature (77 K) for I-V characterizations. In spite of its FD-SOI nanoscale thickness and long channel feature, the device has surprisingly exhibited a Drain-Induced Barrier Lowering (DIBL) effect at RT. However, this effect was suppressed at 77 K. If the apparition of such anomalous effect can be explained by a parasitic short channel transistor located at the edges of the channel, its suppression is explained by the decrease of the potential barrier between the drain and the channel when lowering the temperature

    Study of the Photo- and Thermoactivation Mechanisms in Nanoscale SOI Modulator

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    A new nanoscale silicon-based modulator has been investigated at different temperatures. In addition to these two advantages, nanoscale dimensions (versus MEMS temperature sensors) and integrated silicon-based material (versus polymers), the third novelty of such optoelectronic device is that it can be activated as a Silicon-On-Insulator Photoactivated Modulator (SOIPAM) or as a Silicon-On-Insulator Thermoactivated Modulator (SOITAM). In this work, static and time dependent temperature effects on the current have been investigated. The aim of the time dependent temperature simulation was to set a temporal pulse and to check, for given dimensions, how much time would it take for the temperature profile and for the change in the electrons’ concentration to come back to the steady state. Assuring that the thermal response is fast enough, the device can be operated as a modulator via thermal stimulation or, on the other hand, can be used as thermal sensor/imager. We present here the design, simulation, and model of the second generation which seems capable of speeding up the processing capabilities. This novel device can serve as a building block towards the development of optical/thermal data processing while breaking through the way to all optic processors based on silicon chips that are fabricated via typical microelectronics fabrication process

    Modeling of Current-Voltage Characteristics of the Photoactivated Device Based on SOI Technology

    No full text
    An analytical model of the silicon on insulator photoactivated modulator (SOI-PAM) device is presented in order to describe the concept of this novel device in which the information is electronic while the modulation command is optical. The model, relying on the classic Shockley's analysis, is simple and useful for analyzing and synthesizing the voltage-current relations of the device at low drain voltage. Analytical expressions were derived for the output current as function of the input drain and gate voltages with a parameterization of the physical values such as the doping concentrations, channel and oxide thicknesses, and the optical control energy. A prototype SOI-PAM device having an area of 4 μm × 3 μm with known parameters is used to experimentally validate and support the model. Finally, the model allows the understanding of the physical mechanisms inside the device for both dark and under illumination conditions, and it will be used to optimize and to find the performance limits of the device
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