98 research outputs found

    A 3.4pJ FeRAM-enabled D flip-flop in 0.13”m CMOS for nonvolatile processing in digital systems

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    Nonvolatile processing-continuously operating a digital circuit and retaining state through frequent power interruptions-creates new applications for portable electronics operating from harvested energy and high-performance systems managing power by operating “normally off”. To enable these scenarios, energy processing must happen in parallel with information processing. This work makes the following contributions: 1) the design of a nonvolatile D flip-flop (NVDFF) with embedded ferroelectric capacitors (fecaps) that senses data robustly and avoids race conditions; 2) the integration of the NVDFF into the ASIC design flow with a power management unit (PMU) and a simple one-bit interface to brown-out detection circuitry; and 3) a characterization of the NVDFF statistical signal margin and the energy cost of retaining data.Focus Center Research Program. Focus Center for Circuit & System Solution

    Avalanche-Induced Current Enhancement in Semiconducting Carbon Nanotubes

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    Semiconducting carbon nanotubes under high electric field stress (~10 V/um) display a striking, exponential current increase due to avalanche generation of free electrons and holes. Unlike in other materials, the avalanche process in such 1D quantum wires involves access to the third sub-band, is insensitive to temperature, but strongly dependent on diameter ~exp(-1/d^2). Comparison with a theoretical model yields a novel approach to obtain the inelastic optical phonon emission length, L_OP,ems ~ 15d nm. The combined results underscore the importance of multi-band transport in 1D molecular wires

    Component lifetime modelling

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    There are two approaches to component lifetime modelling. The first one uses a reliability prediction method as described in the (military) handbooks with the appropriate models and parameters. The advantages are: (a) It takes into account all possible failure mechanisms. \ud (b) It is easy to use. \ud \ud The disadvantages are: (a) It assumes a constant failure rate which is often not the case (infant mortality). \ud (b) It contains no designable parameters and therefore it cannot be used for built-in reliability. \ud \ud The second approach is to model the different degradation mechanisms and to incorporate this into an (existing) circuit simulator. Here we have also advantages and disadvantages which are mostly complementary to those of the first method

    A 3.4pJ FeRAM-enabled D flip-flop in 0.13”m CMOS for nonvolatile processing in digital systems

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    Nonvolatile processing-continuously operating a digital circuit and retaining state through frequent power interruptions-creates new applications for portable electronics operating from harvested energy and high-performance systems managing power by operating “normally off”. To enable these scenarios, energy processing must happen in parallel with information processing. This work makes the following contributions: 1) the design of a nonvolatile D flip-flop (NVDFF) with embedded ferroelectric capacitors (fecaps) that senses data robustly and avoids race conditions; 2) the integration of the NVDFF into the ASIC design flow with a power management unit (PMU) and a simple one-bit interface to brown-out detection circuitry; and 3) a characterization of the NVDFF statistical signal margin and the energy cost of retaining data.Focus Center Research Program. Focus Center for Circuit & System Solution

    A Comparison Between GaAs Mesfet and Si NMOS ESD Behaviour

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    Work is in hand at Loughborough University to investigate and compare the ESD sensitivity of GaAs D-MESFETs and unprotected enhancement mode NMOS structures

    An in vitro study comparing a peripherally inserted central catheter to a conventional central venous catheter: no difference in static and dynamic pressure transmission

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    <p>Abstract</p> <p>Background</p> <p>Early goal directed therapy improves survival in patients with septic shock. Central venous pressure (CVP) monitoring is essential to guide adequate resuscitation. Use of peripherally inserted central catheters (PICC) is increasing, but little data exists comparing a PICC to a conventional CVP catheter. We studied the accuracy of a novel PICC to transmit static and dynamic pressures <it>in vitro</it>.</p> <p>Methods</p> <p>We designed a device to generate controlled pressures via a column of water allowing simultaneous measurements from a PICC and a standard triple lumen catheter. Digital transducers were used to obtain all pressure readings. Measurements of static pressures over a physiologic range were recorded using 5Fr and 6Fr dual lumen PICCs. Additionally, random repetitive pressure pulses were applied to the column of water to simulate physiologic intravascular pressure variations. The resultant PICC and control waveforms were recorded simultaneously.</p> <p>Results</p> <p>Six-hundred thirty measurements were made using the 5 Fr and 6 Fr PICCs. The average bias determined by Bland-Altman plot was 0.043 mmHg for 5 Fr PICC and 0.023 mmHg for 6 Fr PICC with a difference range of 1.0 to -1.0. The correlation coefficient for both catheters was 1.0 (p-value < 0.001). Dynamic pressure waveforms plotted simultaneously between PICC and control revealed equal peaks and troughs.</p> <p>Conclusion</p> <p><it>In vitro</it>, no static or dynamic pressure differences were found between the PICC and a conventional CVP catheter. Clinical studies are required to assess whether the novel PICC has bedside equivalence to conventional catheters when measuring central venous pressures.</p
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