Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm

A novel transistor-level synthesis procedure for pipeline ADCs is presented. This procedure is able to directly map high-level converter specifications onto transistor sizes and biasing conditions. It is based on the combination of behavioral models for performance evaluation, optimization routines to minimize the power and area consumption of the circuit solution, and an algorithm to efficiently constraint the converter design space. This algorithm precludes the cost of lengthy bottom-up verifications and speeds up the synthesis task. The approach is herein demonstrated via the design of a 0.13 μm CMOS 10 bits@60 MS/s pipeline ADC with energy consumption per conversion of only 0.54 pJ@1 MHz, making it one of the most energy-efficient 10-bit video-rate pipeline ADCs reported to date. The computational cost of this design is of only 25 min of CPU time, and includes the evaluation of 13 different pipeline architectures potentially feasible for the targeted specifications. The optimum design derived from the synthesis procedure has been fine tuned to support PVT variations, laid out together with other auxiliary blocks, and fabricated. The experimental results show a power consumption of 23 [email protected] V and an effective resolution of 9.47-bit@1 MHz. Bearing in mind that no specific power reduction strategy has been applied; the mentioned results confirm the reliability of the proposed approach.Ministerio de Ciencia e Innovación TEC2009-08447Junta de Andalucía TIC-0281

Accurate Settling-Time Modeling and Design Procedures for Two-Stage Miller-Compensated Amplifiers for Switched-Capacitor Circuits

We present modeling techniques for accurate estimation of settling errors in switched-capacitor (SC) circuits built with Miller-compensated operational transconductance amplifiers (OTAs). One distinctive feature of the proposal is the computation of the impact of signal levels (on both the model parameters and the model structure) as they change during transient evolution. This is achieved by using an event-driven behavioral approach that combines small- and large-signal behavioral descriptions and keeps track of the amplifier state after each clock phase. Also, SC circuits are modeled under closed-loop conditions to guarantee that the results remain close to those obtained by electrical simulation of the actual circuits. Based on these models, which can be regarded as intermediate between the more established small-signal approach and full-fledged simulations, design procedures for dimensioning SC building blocks are presented whose targets are system-level specifications (such as ENOB and SNDR) instead of OTA specifications. The proposed techniques allow to complete top-down model-based designs with 0.3-b accuracy.Ministerio de Educación y Ciencia TEC2006-03022Junta de Andalucía TIC-0281

A 5.3mW, 2.4GHz ESD protected Low-Noise Amplifier in a 0.13μm RFCMOS technology

An Electrostatic Discharge (ESD) protected Low- Noise Amplifier (LNA) for the 2.4 GHz ISM band designed in a 0.13 mum standard RFCMOS technology is presented. The amplifier, including packaging effects, achieves 16.8 dB power gain, reflexion coefficients S 11 , S 22 < -30 dB over the 2.4 GHz ISM band, a peak noise figure of 1.8 dB, and an IIP 3 of 1 dBm, while drawing less than 4.5 mA dc biasing current from the 1.2 V power supply. Further, the LNA withstands a Human Body Model (HBM) ESD stress up to plusmn2.0 kV, by means of the additional custom protection circuitry.Comisión Interministerial de Ciencia y Tecnología TIC2003-02355Ministerio de Educación y Ciencia TEC2006-0302

Modelo de ferreterías autoadministrables en el norte de Antioquia

La monografía “MODELO DE FERRETERÍAS AUTOADMINISTRABLES EN EL NORTE DE ANTIOQUIA”, se desarrolla debido a la necesidad de dar solución a problemas en la estructura de costos y la gestión de inventario de la Ferretería Punto Amarillo. Siendo el Core del negocio la venta de productos, está completamente ligado su éxito, a la correcta administración del inventario con los menores costos posibles. Es por tal razón que se desarrollarán cuatro capítulos en los cuales se muestran modelos para controlar y mejorar la eficiencia en dichos procesos. Para efectos de entendimiento y para tener una base de cómo se deberán aplicar dichos modelos en la empresa, se aplicarán las nuevas metodologías a los productos más representativos para evaluar cómo se deberá analizar cada resultado obtenido

A self-calibration circuit for a neural spike recording channel

This paper presents a self-calibration circuit for a neural spike recording channel. The proposed design tunes the bandwidth of the signal acquisition Band-Pass Filter (BPF), which suffers from process variations corners. It also performs the adjustment of the Programmable Gain Amplifier (PGA) gain to maximize the input voltage range of the analog-to-digital conversion. The circuit, which consists on a frequency-controlled signal generator and a digital processor, operates in foreground, is completely autonomous and integrable in an estimated area of 0.026mm 2 , with a power consumption around 450nW. The calibration procedure takes less than 250ms to select the configuration whose performance is closest to the required one.Ministerio de Ciencia e Innovación TEC2009-08447Junta de Andalucía TIC-0281

Simulation-based high-level synthesis of Nyquist-rate data converters using MATLAB/SIMULINK

This paper presents a toolbox for the simulation, optimization and high-level synthesis of Nyquist-rate Analog-to-Digital (A/D) and Digital-to-Analog (D/A) Converters in MATLAB®. The embedded simulator uses SIMULINK® C-coded S-functions to model all required subcircuits including their main error mechanisms. This approach allows to drastically speed up the simulation CPU-time up to 2 orders of magnitude as compared with previous approaches - based on the use of SIMULINK® elementary blocks. Moreover, S-functions are more suitable for implementing a more detailed description of the circuit. For all subcircuits, the accuracy of the behavioral models has been verified by electrical simulation using HSPICE. For synthesis purposes, the simulator is used for performance evaluation and combined with an hybrid optimizer for design parameter selection. The optimizer combines adaptive statistical optimization algorithm inspired in simulated annealing with a design-oriented formulation of the cost function. It has been integrated in the MATLAB/SIMULINK® platform by using the MATLAB® engine library, so that the optimization core runs in background while MATLAB® acts as a computation engine. The implementation on the MATLAB® platform brings numerous advantages in terms of signal processing, high flexibility for tool expansion and simulation with other electronic subsystems. Additionally, the presented toolbox comprises a friendly graphical user interface to allow the designer to browse through all steps of the simulation, synthesis and post-processing of results. In order to illustrate the capabilities of the toolbox, a 0.13)im CMOS 12bit@80MS/s analog front-end for broadband power line communications, made up of a pipeline ADC and a current steering DAC, is synthesized and high-level sized. Different experiments show the effectiveness of the proposed methodology.Ministerio de Ciencia y Tecnología TIC2003-02355RAICONI

A power efficient neural spike recording channel with data bandwidth reduction

This paper presents a mixed-signal neural spike recording channel which features, as an added value, a simple and low-power data compression mechanism. The channel uses a band-limited differential low noise amplifier and a binary search data converter, together with other digital and analog blocks for control, programming and spike characterization. The channel offers a self-calibration operation mode and it can be configured both for signal tracking (to raw digitize the acquired neural waveform) and feature extraction (to build a first-order PWL approximation of the spikes). The prototype has been fabricated in a standard CMOS 0.13μm and occupies 400μm×400μm. The overall power consumption of the channel during signal tracking is 2.8μW and increases to 3.0μW average when the feature extraction operation mode is programmed.Ministerio de Ciencia e Innovación TEC2009-08447Junta de Andalucía TIC-0281

Siete principios rectores para la génesis de una evaluación emancipatoria: un aporte crítico desde el pensamiento pedagógico Latinoamericano

The great educators of the South tried to break with their contributions and practices the statu quo of frequent oppressors versus eternal oppressed in the school environment. However, the same colonial struggle is still observed in higher education classrooms: the foreman of the slaver and the subjugated slaves; today this is reinterpreted in the roles of oppressive teachers versus oppressed student in which an "education struggles in the classrooms" is perceived. The purpose of this document is to deconstruct and reconstruct elements around the evaluation of learning, as an unexplained but inferred word in Latin American pedagogical thought. It aspires to a road map, based on seven necessary principles, that will smooth educational theory and practice and lead to freedom of thinking, feeling and making learning evidence that will free students in the domains of their behavior.Los grandes pedagogos del Sur, con sus aportes y prácticas, intentaron romper el statu quo de opresores frecuentes versus oprimidos eternos en el ámbito escolar. Con todo, aún se observa la vigencia de la misma lucha colonial en las aulas de educación superior: el capataz del encomendero y los esclavos sometidos; hoy en día eso se reinterpreta en los roles del profesorado opresor versus alumnado oprimido en donde se percibe una educación que lucha en las clases. El propósito de este trabajo es deconstruir y reconstruir elementos en torno a la evaluación de aprendizajes, como palabra no explicitada, pero inferida, en el pensamiento pedagógico latinoamericano. Se aspira a una hoja de ruta, a partir de siete principios necesarios para equilibrar la teoría y la práctica educativa y encaminarlas hacia la libertad del pensar, sentir y hacer evidencias de aprendizaje que liberen al alumnado en los dominios de su conducta

Electrical-level synthesis of pipeline ADCs

This paper presents a design tool for the synthesis of pipeline ADCs which is able to optimally map high-level converter specifications, such as the required effective resolution, onto electrical-level parameters, i.e., transistor sizes and biasing conditions. It is based on the combination of a behavioural simulator for performance evaluation, accurate models of the converter components, and an optimization algorithm to minimize the power and area consumption of the circuit solution. The design procedure is herein demonstrated with the complete design of a 0.13 mum CMOS 10 bits@60MS/s pipeline ADC, which only consumes 11.3 mW from a 1.2 V supply voltage. A close agreement between behavioural- and electrical-level simulations is obtained with only 0.2 bit deviation on the measured ENOB.Ministerio de Educación y Ciencia TEC2006-03022Junta de Andalucía TIC-0281

Cognitive problem-solving abilities and speech acts in children: an analysis in vulnerable family contexts

The goal of this study was to analyze the cognitive abilities involved in interpersonal problemsolving and their connection with speech acts in children from contexts of social vulnerability. The sample included 120 schoolchildren between the ages of 8-13 in Mendoza, Argentina. The results showed that the children from more vulnerable family backgrounds, presented significantly less expressive speech acts than children at low vulnerability. It was also observed that displayed significantly poorer identification of emotions and anticipated significantly more negative consequences. In contrast, children who had high level of protective factors identified significantly more emotions, tended to generate more alternatives and anticipated less negative consequences. These results highlight the importance of carrying out early evaluations in contexts of risk, taking a preventive approach, and articulating knowledge from the fields of psychology and linguistics in order to develop new kinds of intervention and support strategies destined to children in school contexts.Fil: Morelato, Gabriela Susana. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Mendoza. Instituto de Ciencias Humanas, Sociales y Ambientales; Argentina. Universidad del Aconcagua. Facultad de Psicología; ArgentinaFil: Ison, Mirta Susana. Universidad del Aconcagua. Facultad de Psicologia; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Mendoza. Instituto de Ciencias Humanas, Sociales y Ambientales; ArgentinaFil: Amaya, Marcela. Universidad de Santiago de Chile; ChileFil: Delgado, Melania. Universidad del Aconcagua. Facultad de Psicología; Argentin