Specification and verification of synchronisation classes in Java:A practical approach

Digital services are becoming an essential part of our daily lives. To provide these services, efficient software plays an important role. Concurrent programming is a technique that developers can exploit to gain more performance. In a concurrent program several threads of execution simultaneously are being executed. Sometimes they have to compete to access shared resources, like memory. This race of accessing shared memories can cause unexpected errors. Programmers use synchronisation constructs to tame the concurrency and control the accesses. In order to develop reliable concurrent software, the correctness of these synchronisation constructs is crucial. In this thesis we use a program logic, called permission-based Separation Logic, to statically reason about the correctness of synchronisation constructs. The logic has the power to reason about correct ownership of threads regarding shared memory. A correctly functioning synchroniser is responsible for exchanging a correct permission when a thread requests access to the shared memory. We use our VERCORS verification tool-set to verify the correctness of various synchronisation constructs. In Chapter 1 we discuss the scope of the thesis. All the required technical background about permission-based Separation Logic and synchronisation classes is explained in Chapter 2. In Chapter 3 we discuss how threads' start and join as minimum synchronisation points can be verified. To verify correctness of the synchronisation classes we have to first specify expected behaviour of the classes. This is covered in Chapter 4. In this chapter we present a unified approach to abstractly describe the common behaviour of synchronisers. Using our specifications, one is able to reason about the correctness of the client programs that access the shared state through the synchronisers. The atomic classes of java.util.concurrent are the core element of every synchronisation construct implementation. In Chapter 5 and Chapter 6 we propose a specification for atomic classes. Using this contract, we verified the implementation of synchronisation constructs w.r.t to their specifications from Chapter 4. In our proposed contract the specification of the atomic classes is parameterized with the protocols and resource invariants. Based on the context, the parameters can be defined. In Chapter 7 we propose a verification stack where each layer of stack verifies one particular aspect of a specified concurrent program in which atomic operations are the main synchronisation constructs. We demonstrate how to verify that a non-blocking data structure is data-race free and well connected. Based on the result of the verification from the lower layers, upper layers can reason about the functional properties of the concurrent data structure. In Chapter 8 we present a sound specification and verification technique to reason about data race freedom and functional correctness of GPU kernels that use atomic operations as synchronisation mechanism. Finally, Chapter 9 concludes the thesis with future directions

GPURepair: Automated Repair of GPU Kernels

This paper presents a tool for repairing errors in GPU kernels written in CUDA or OpenCL due to data races and barrier divergence. Our novel extension to prior work can also remove barriers that are deemed unnecessary for correctness. We implement these ideas in our tool called GPURepair, which uses GPUVerify as the verification oracle for GPU kernels. We also extend GPUVerify to support CUDA Cooperative Groups, allowing GPURepair to perform inter-block synchronization for CUDA kernels. To the best of our knowledge, GPURepair is the only tool that can propose a fix for intra-block data races and barrier divergence errors for both CUDA and OpenCL kernels and the only tool that fixes inter-block data races for CUDA kernels. We perform extensive experiments on about 750 kernels and provide a comparison with prior work. We demonstrate the superiority of GPURepair through its capability to fix more kernels and its unique ability to remove redundant barriers and handle inter-block data races.Comment: 19 pages, 1 algorithm, 3 figures, 22nd International Conference on Verification Model Checking and Abstract Interpretation (VMCAI 2021

Regulation of Alr1 Mg Transporter Activity by Intracellular Magnesium

Mg homeostasis is critical to eukaryotic cells, but the contribution of Mg transporter activity to homeostasis is not fully understood. In yeast, Mg uptake is primarily mediated by the Alr1 transporter, which also allows low affinity uptake of other divalent cations such as Ni2+, Mn2+, Zn2+ and Co2+. Using Ni2+ uptake to assay Alr1 activity, we observed approximately nine-fold more activity under Mg-deficient conditions. The mnr2 mutation, which is thought to block release of vacuolar Mg stores, was associated with increased Alr1 activity, suggesting Alr1 was regulated by intracellular Mg supply. Consistent with a previous report of the regulation of Alr1 expression by Mg supply, Mg deficiency and the mnr2 mutation both increased the accumulation of a carboxy-terminal epitope-tagged version of the Alr1 protein (Alr1-HA). However, Mg supply had little effect on ALR1 promoter activity or mRNA levels. In addition, while Mg deficiency caused a seven-fold increase in Alr1-HA accumulation, the N-terminally tagged and untagged Alr1 proteins increased less than two-fold. These observations argue that the Mg-dependent accumulation of the C-terminal epitope-tagged protein was primarily an artifact of its modification. Plasma membrane localization of YFP-tagged Alr1 was also unaffected by Mg supply, indicating that a change in Alr1 location did not explain the increased activity we observed. We conclude that variation in Alr1 protein accumulation or location does not make a substantial contribution to its regulation by Mg supply, suggesting Alr1 activity is directly regulated via as yet unknown mechanisms