CMOS circuits for analog signal processing

Design choices in CMOS analog signal processing circuits are presented. Special attention is focussed on continuous-time filter technologies. The basics of MOSFET-C continuous-time filters and CMOS Square Law Circuits are explained at the hand of a graphical MOST characteristics representation

Analog signal processing on a reconfigurable platform

The Cooperative Analog/Digital Signal Processing (CADSP) research group's approach to signal processing is to see what opportunities lie in adjusting the line between what is traditionally computed in digital and what can be done in analog. By allowing more computation to be done in analog, we can take advantage of its low power, continuous domain operation, and parallel capabilities. One setback keeping Analog Signal Processing (ASP) from achieving more wide-spread use, however, is its lack of programmability. The design cycle for a typical analog system often involves several iterations of the fabrication step, which is labor intensive, time consuming, and expensive. These costs in both time and money reduce the likelihood that engineers will consider an analog solution. With CADSP's development of a reconfigurable analog platform, a Field-Programmable Analog Array (FPAA), it has become much more practical for systems to incorporate processing in the analog domain. In this Thesis, I present an entire chain of tools that allow one to design simply at the system block level and then compile that design onto analog hardware. This tool chain uses the Simulink design environment and a custom library of blocks to create analog systems. I also present several of these ASP blocks, covering a broad range of functions from matrix computation to interfacing. In addition to these tools and blocks, the most recent FPAA architectures are discussed. These include the latest RASP general-purpose FPAAs as well as an adapted version geared toward high-speed applications.M.S.Committee Chair: Hasler, Paul; Committee Member: Anderson, David; Committee Member: Ghovanloo, Maysa

Hybrid-cascade Coupled-Line Phasers for High-resolution Radio-Analog Signal Processing

A hybrid-cascade (HC) coupled-line phaser configuration is presented to synthesize enhanced group delay responses for high-resolution Radio-Analog Signal Processing (R-ASP). Using exact analytical transfer functions, the superiority of HC coupled-line phasers over conventional transversally cascaded C-section phasers is demonstrated and verified using full-wave simulations.Comment: 2 pages, 5 figure

Analog Signal Processing in Transmission Line Metamaterial Structures

Several novel dispersion-engineered CRLH TL metamaterial analog signal processing systems, exploiting the broadband dispersive characteristics and design flexibility of CRLH TLs, are presented. These systems are either guided-wave or radiated-wave systems, and employ either the group velocity or the group velocity dispersion parameters. The systems presented are: a frequency tunable impulse delay line, a pulse-position modulator, a frequency discriminator and real-time Fourier transformer, pulse generators, an analog real-time spectrum analyzer, a frequencyresolved electrical gating, a spatio-temporal Talbot effect imager, and analog true-time delayer. They represent a new class of impulse-regime metamaterial structures, while previously reported metamaterials were mostly restricted to the harmonic regime

ПОШУК АДАПТИВНИХ МЕТОДІВ ІМУНІЗАЦІЇ З ВИСОКИМ РІВНЕМ ШУМУ, ЗАЯВУ ПРО НАФТОВОЇ ПРОМИСЛОВОСТІ ЕНЕРГЕТИЧНИХ КОМПЛЕКСІВ МОДЕЛЬ УПРАВЛІННЯ ТЕЛЕМЕТРІЄЮ

Here in the paper, an analog signal processing implementation was searched for the detection the most efficient adaptive noise cancellation filters among dozens of recognized ones for telemetry control systems of oil industry electrical submersible pump under severe noisily conditions.Here in the paper, an analog signal processing implementation was searched for the detection the most efficient adaptive noise cancellation filters among dozens of recognized ones for telemetry control systems of oil industry electrical submersible pump under severe noisily conditions

Analog Signal Processing Elements for Energy-Constrained Platforms

Energy constrained processing poses a number of challenges that have resulted in tremendous innovations over the past decade. Shrinking supply voltages and limited clock speeds have placed an emphasis on processing efficiency over the raw throughput of a processor. One of the approaches to increase processing efficiency is to use parallel processing with slower, lower resolution processing elements. By utilizing this parallel approach, power consumption can be decreased while maintaining data throughput relative to other more power-hungry architectures.;This low resolution / parallel architecture has direct application in the analog as well as the digital domain. Indeed, research shows that as the resolution of a signal processor falls below a system-dependent threshold, it is almost always more efficient to preform the processing in the analog domain. These continuous-time circuits have long been used in the most energy-constrained applications, ranging from pacemakers and cochlear implants to wireless sensor motes designed to run autonomously for months in the field.;Most audio processing techniques utilize spectral decomposition as the first step of their algorithms, whether by a FFT/DFT in the digital domain or a bank of bandpass filters in the analog domain. The work presented here is designed to function within the parallel, array-based environment of a bank of bandpass filters. Work to improve the simulation of programmable analog storage elements (Floating-Gate transistors) in typical SPICE-based simulators is presented, along with a novel method of harnessing the unique properties of these Floating-Gate (FG) transistors to extend the linear range of a differential pair. These improvements in simulation and linearity are demonstrated in a Variable-Gain Amplfier (VGA) to compress large differential inputs into small single-ended outputs suitable for processing by other analog elements. Finally, a novel circuit composed of only six transistors is proposed to compute the continuous-time derivative of a signal within the sub-banded architecture of the bandpass filter bank