Managing preventative maintenance activities at Intel Corporation

Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Civil and Environmental Engineering; and, (M.B.A.)--Massachusetts Institute of Technology, Sloan School of Management; in conjunction with the Leaders for Manufacturing Program at MIT, 2006.Includes bibliographical references (leaf 51).The work for this thesis was completed at Intel Corporation in Colorado Springs, Colorado at Fab 23, a semiconductor fabrication facility making flash memory. The project focused on evaluating and managing preventative maintenance activities to improve WIP (Work in Progress) management and cycle time. Equipment runs a factory, but effective maintenance of that equipment is often overlooked for improvement efforts due to constrained technical resources. However, preventative maintenance (PM) activities can provide process stability and increased throughput if scheduled and executed efficiently. This thesis evaluates the benefits of coordinating PMs among functional areas and the effectiveness of existing PM practices at a 24 hours per day, 7 days per week facility. Using a WIP model, I show that wait times can be significantly reduced by scheduling PMs on sequential tools at the same time, so WIP only waits once for PMs. Additionally, the goal of an effective maintenance team is to spend more scheduled time maintaining equipment and less time doing unscheduled repairs. A base line of PM performance at Fab 23 is completed showing that they have opportunities to improve their PM processes by learning from other Intel facilities and implementing off-line repairs.by Rebecca Cassler Fearing.M.B.A.S.M

A Simulation study of dispatching rules and rework strategies in semiconductor manufacturing

The semiconductor industry is fast paced and on the cutting edge of technology, resulting in very short life spans of semiconductor products. In order to stay competitive, manufacturers must be able to quickly adapt to produce new products, and they must achieve a high level of productivity. Two major operational components of semiconductor fabrication plants (fabs) that effect productivity are dispatching rules and rework strategies. Although prior research has been conducted independently on these two issues, the hypothesis is that the interrelationship between the dispatching rules and rework strategies has a significant effect on the productivity of the fab. Moreover, the goal is to determine which combination of widely-used dispatching rules and new and existing rework strategies results in the highest level of fab productivity. To test this hypothesis, the significance of rework is evalutated, and a four-factor experiment is conducted to determine the effect of dispatching rules, rework strategies, fab types, and rework levels on key fab performance measures. Five dispatching rules are combined with three previously studied rework strategies and the first bottleneck strategy which is developed in this study. The treatment combinations are compared based on fab performance measures including cycle time, percentage on time, work-in-process, and the XTheoretical value. Simulation models based on actual fab data are constructed to carry out the experiments. The detailed results of the experiment show that combinations of dispatching rules and rework strategies have a significant impact on fab performance measures at each rework level in both fab types. In general, two dispatching rules, rework priority and first-in-first-out, in combination with the first bottleneck rework strategy perform the best. Further analysis concludes that the rework priority dispatching rule and the first bottleneck rework strategy result in the highest level of fab performance and are most robust over alterative fab configurations

Entwicklung und Einführung von Produktionssteuerungsverbesserungen für die kundenorientierte Halbleiterfertigung

Production control in a semiconductor production facility is a very complex and timeconsuming task. Different demands regarding facility performance parameters are defined by customer and facility management. These requirements are usually opponents, and an efficient strategy is not simple to define. In semiconductor manufacturing, the available production control systems often use priorities to define the importance of each production lot. The production lots are ranked according to the defined priorities. This process is called dispatching. The priority allocation is carried out by special algorithms. In literature, a huge variety of different strategies and rules is available. For the semiconductor foundry business, there is a need for a very flexible and adaptable policy taking the facility state and the defined requirements into account. At our case the production processes are characterized by a low-volume high-mix product portfolio. This portfolio causes additional stability problems and performance lags. The unstable characteristic increases the influence of reasonable production control logic. This thesis offers a very flexible and adaptable production control policy. This policy is based on a detailed facility model with real-life production data. The data is extracted from a real high-mix low-volume semiconductor facility. The dispatching strategy combines several dispatching rules. Different requirements like line balance, throughput optimization and on-time delivery targets can be taken into account. An automated detailed facility model calculates a semi-optimal combination of the different dispatching rules under a defined objective function. The objective function includes different demands from the management and the customer. The optimization is realized by a genetic heuristic for a fast and efficient finding of a close-to-optimal solution. The strategy is evaluated with real-life production data. The analysis with the detailed facility model of this fab shows an average improvement of 5% to 8% for several facility performance parameters like cycle time per mask layer. Finally the approach is realized and applied at a typical high-mix low-volume semiconductor facility. The system realization bases on a JAVA implementation. This implementation includes common state-of-the-art technologies such as web services. The system replaces the older production control solution. Besides the dispatching algorithm, the production policy includes the possibility to skip several metrology operations under defined boundary conditions. In a real-life production process, not all metrology operations are necessary for each lot. The thesis evaluates the influence of the sampling mechanism to the production process. The solution is included into the system implementation as a framework to assign different sampling rules to different metrology operations. Evaluations show greater improvements at bottleneck situations. After the productive introduction and usage of both systems, the practical results are evaluated. The staff survey offers good acceptance and response to the system. Furthermore positive effects on the performance measures are visible. The implemented system became part of the daily tools of a real semiconductor facility.Produktionssteuerung im Bereich der kundenorientierten Halbleiterfertigung ist heutzutage eine sehr komplexe und zeitintensive Aufgabe. Verschiedene Anforderungen bezüglich der Fabrikperformance werden seitens der Kunden als auch des Fabrikmanagements definiert. Diese Anforderungen stehen oftmals in Konkurrenz. Dadurch ist eine effiziente Strategie zur Kompromissfindung nicht einfach zu definieren. Heutige Halbleiterfabriken mit ihren verfügbaren Produktionssteuerungssystemen nutzen oft prioritätsbasierte Lösungen zur Definition der Wichtigkeit eines jeden Produktionsloses. Anhand dieser Prioritäten werden die Produktionslose sortiert und bearbeitet. In der Literatur existiert eine große Bandbreite verschiedener Algorithmen. Im Bereich der kundenorientierten Halbleiterfertigung wird eine sehr flexible und anpassbare Strategie benötigt, die auch den aktuellen Fabrikzustand als auch die wechselnden Kundenanforderungen berücksichtigt. Dies gilt insbesondere für den hochvariablen geringvolumigen Produktionsfall. Diese Arbeit behandelt eine flexible Strategie für den hochvariablen Produktionsfall einer solchen Produktionsstätte. Der Algorithmus basiert auf einem detaillierten Fabriksimulationsmodell mit Rückgriff auf Realdaten. Neben synthetischen Testdaten wurde der Algorithmus auch anhand einer realen Fertigungsumgebung geprüft. Verschiedene Steuerungsregeln werden hierbei sinnvoll kombiniert und gewichtet. Wechselnde Anforderungen wie Linienbalance, Durchsatz oder Liefertermintreue können adressiert und optimiert werden. Mittels einer definierten Zielfunktion erlaubt die automatische Modellgenerierung eine Optimierung anhand des aktuellen Fabrikzustandes. Die Optimierung basiert auf einen genetischen Algorithmus für eine flexible und effiziente Lösungssuche. Die Strategie wurde mit Realdaten aus der Fertigung einer typischen hochvariablen geringvolumigen Halbleiterfertigung geprüft und analysiert. Die Analyse zeigt ein Verbesserungspotential von 5% bis 8% für die bekannten Performancekriterien wie Cycletime im Vergleich zu gewöhnlichen statischen Steuerungspolitiken. Eine prototypische Implementierung realisiert diesen Ansatz zur Nutzung in der realen Fabrikumgebung. Die Implementierung basiert auf der JAVA-Programmiersprache. Aktuelle Implementierungsmethoden erlauben den flexiblen Einsatz in der Produktionsumgebung. Neben der Fabriksteuerung wurde die Möglichkeit der Reduktion von Messoperationszeit (auch bekannt unter Sampling) unter gegebenen Randbedingungen einer hochvariablen geringvolumigen Fertigung untersucht und geprüft. Oftmals ist aufgrund stabiler Prozesse in der Fertigung die Messung aller Lose an einem bestimmten Produktionsschritt nicht notwendig. Diese Arbeit untersucht den Einfluss dieses gängigen Verfahrens aus der Massenfertigung für die spezielle geringvolumige Produktionsumgebung. Die Analysen zeigen insbesondere in Ausnahmesituationen wie Anlagenausfällen und Kapazitätsengpässe einen positiven Effekt, während der Einfluss unter normalen Produktionsbedingungen aufgrund der hohen Produktvariabilität als gering angesehen werden kann. Nach produktiver Einführung in einem typischen Vertreter dieser Halbleiterfabriken zeigten sich schnell positive Effekte auf die Fabrikperformance als auch eine breite Nutzerakzeptanz. Das implementierte System wurde Bestandteil der täglichen genutzten Werkzeuglandschaft an diesem Standort

A method for determining tool group flexibility with uncertain machine availability - applications in a semiconductor manufacturing process / Adam Terry, Mamidala Ramulu and Posinasetti Nageswara Rao

The production of Integrated Circuits (IC) is a detailed and exacting process requiring tight specifications and precise equipment. The high cost and unique traits of this equipment requires high utilization and maximum throughput to achieve real profits. The design of fabrication facility (FAB) processes requires a thorough understanding of the adverse effects that random machine availability has on system performance. These effects (increased cycle time, decreased and variable throughput, etc) can be offset by tool group flexibility. Tool group flexibility can be described by two measures: machine flexibility (the number of tasks a machine can perform) and task flexibility (the number of machines qualified to perform a specific task). These two measures are related by the ratio of the number of machines in the tool group to the number of tasks that the group must perform. This paper utilizes a combined linear programming and simulation approach in an attempt to model the manufacturing system to gain insight into the production dynamics. The model is based on current production methodology and the use of modular equipment (steppers). The results include some insight into the added cost of flexibility and the associated production ramifications

Multi-wavelength pyrometric systems for emissivity-independent non-contact temperature sensing

A Multi-Wavelength Imaging Pyrometer (M-WIP) for real-time remote sensing of temperature profiles of targets with unknown emissivity was developed and demonstrated. To measure the spectral radiance of a target at several distinct wavelengths an M-WIP system was implemented based on an 320x122-element PtSi IR-CCD imager with an assembly of 7 narrow-band 1k filters in the range from 1790nm to 4536nm. A real-time algorithm for simultaneous estimation of the temperature and model parameters of the target emissivity from the least-squares fit of the theoretical model of 1k camera output signal to the experimental spectral measurements was developed and implemented. This rea1-time least-squares minimization was accomplished by combination of Levenberg-Marquardt and simulated annealing algorithms. The least-squares-based calibration algorithm was developed for evaluation of effective values of peak transmissions and center wavelengths of M-WIP channels based on the detection of radiation from pre-calibrated blackbody source. To achieve high radiometric accuracy, compensation for the dark current charge as function of the detected signal level was implemented. The effect of the response non-linearity of IR imager was minimized by developing an algorithm for imager operation at fixed pre-selected signal level for each M-WIP spectral channel based on adaptive control of the duration of the optical integration time of the imager. Initial testing demonstrated an accuracy of ±l.0°C for real-time temperature measurements of the center of the blackbody aperture in the range from 500°C to 1000°C. Temperature resolution of ±3°C was demonstrated for the blackbody source viewed through a double side polished silicon wafer with unknown spectral transmissivity in the temperature range from 500°C to 900°C

MODELING AND SIMULATION OF A SEMICONDUCTOR MANUFACTURING FAB FOR CYCLE TIME ANALYSIS

The goal of the thesis is to conduct a study of the effects of scheduling policies and machine failures on the manufacturing cycle time of the Integrated Circuit (IC) manufacturing process for two processor chips, namely Skylake and Kabylake, manufactured by Intel. The fab simulation model was developed as First in First Out (FIFO), Shortest Processing Time (SPT), Priority based (PB), and Failure FIFO (machine failures) model, and the average cycle times and queue waiting times under the four scheduling policy models were compared for both the Skylake and Kabylake wafers. The study revealed that scheduling policies SPT and PB increased the average cycle time for Skylake wafers while decreasing the average cycle time for the Kabylake wafers, when compared to the base FIFO model. Machine failures increased the average cycle time for both types of wafers

Applying run-by-run process control to chemical-mechanical planarization and assessing insertion costs versus benefits of CMP

Thesis (M.S.)--Massachusetts Institute of Technology, Sloan School of Management, 1995, and Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995.Includes bibliographical references (p. 87-89).by Arthur H. Altman.M.S